参数资料
型号: P89LPC9301FDH
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB-8 kB 3 V byte-erasable flash
中文描述: 8-BIT, FLASH, 18 MHz, MICROCONTROLLER, PDSO28
封装: 4.40 MM, PLASTIC, MO-153, SOT-361, TSSOP-28
文件页数: 10/66页
文件大小: 1326K
代理商: P89LPC9301FDH
P89LPC9301_931A1
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 29 November 2010
18 of 66
NXP Semiconductors
P89LPC9301/931A1
8-bit microcontroller with accelerated two-clock 80C51 core
7.2 Enhanced CPU
The P89LPC9301/931A1 uses an enhanced 80C51 CPU which runs at six times the
speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and
most instructions execute in one or two machine cycles.
7.3 Clocks
7.3.1 Clock definitions
The P89LPC9301/931A1 device has several internal clocks as defined below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four clock
sources (see Figure 4) and can also be optionally divided to a slower frequency (see
Remark: fosc is defined as the OSCCLK frequency.
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per machine
cycle, and most instructions are executed in one to two machine cycles (two or four CCLK
cycles).
RCCLK — The internal 7.373 MHz RC oscillator output. The clock doubler option, when
enabled, provides an output frequency of 14.746 MHz.
PCLK — Clock for the various peripheral devices and is CCLK2.
7.3.2 CPU clock (OSCCLK)
The P89LPC9301/931A1 provides several user-selectable oscillator options in generating
the CPU clock. This allows optimization for a range of needs from high precision to lowest
possible cost. These options are configured when the flash is programmed and include an
on-chip watchdog oscillator, an on-chip RC oscillator, an oscillator using an external
crystal, or an external clock source.
7.4 Crystal oscillator option
The crystal oscillator can be optimized for low, medium, or high frequency crystals
covering a range from 20 kHz to 18 MHz. It can be the clock source of OSCCLK and RTC.
Low speed oscillator option can be the clock source of WDT.
7.4.1 Low speed oscillator option
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this configuration.
7.4.2 Medium speed oscillator option
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this configuration.
7.4.3 High speed oscillator option
This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic
resonators are also supported in this configuration.
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