参数资料
型号: P89LPC930FDH
厂商: NXP Semiconductors N.V.
元件分类: 8位微控制器
英文描述: 8-bit microcontrollers with two-clock 80C51 core 4 kB-8 kB 3 V Flash with 256-byte data RAM
封装: P89LPC930FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<week 47, 2004,;P89LPC931FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html&l
文件页数: 12/55页
文件大小: 267K
代理商: P89LPC930FDH
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 05 — 15 December 2004
2 of 55
9397 750 14472
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
s Low voltage reset (Brownout detect) allows a graceful system shutdown when
power fails. May optionally be congured as an interrupt.
s Oscillator Fail Detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
s Congurable on-chip oscillator with frequency range and RC oscillator options
(selected by user programmed Flash conguration bits). The RC oscillator (factory
calibrated to
±1 %) option allows operation without external oscillator
components. Oscillator options support frequencies from 20 kHz to the maximum
operating frequency of 18 MHz. The RC oscillator option is selectable and ne
tunable.
s Programmable port output conguration options:
x Quasi-bidirectional
x Open drain
x Push-pull
x Input-only
s Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value
of the pins match or do not match a programmable pattern.
s Second data pointer.
s Schmitt trigger port inputs.
s LED drive capability (20 mA) on all port pins. Maximum combined I/O current of
100 mA.
s Controlled slew rate port outputs to reduce EMI. Outputs have approximately
10 ns minimum ramp times.
s 23 I/O pins minimum (28-pin package). Up to 26 I/O pins while using on-chip
oscillator and reset options.
s Only power and ground connections are required to operate the P89LPC930/931
using on-chip oscillator and on-chip reset options.
s Serial Flash programming allows in-circuit production coding. Flash security bits
prevent reading of sensitive programs.
s
In-Application Programming of the Flash code memory. This allows changing the
code in a running application.
s Idle and two different Power-down reduced power modes. Improved wake-up from
Power-down mode (a low interrupt input starts execution). Typical Power-down
current is 1
A (total Power-down with voltage comparators disabled).
s 28-pin TSSOP package.
s Emulation support.
相关PDF资料
PDF描述
P89LPC931FDH 8-bit microcontrollers with two-clock 80C51 core 4 kB-8 kB 3 V Flash with 256-byte data RAM
P89LPC9321FDH 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM
P89LPC932A1FDH 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM
P89LPC932A1FHN 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM
P89LPC9331FDH 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB-8 kB-16 kB 3 V byte-erasable flash with 8-bit ADCs
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