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参数资料
| 型号： | P89LPC9321FDH |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM |
| 中文描述： | 8-BIT, FLASH, 18 MHz, MICROCONTROLLER, PDSO28 |
| 封装： | 4.40 MM, PLASTIC, MO-153, SOT361-1, TSSOP-28 |
| 文件页数： | 37/71页 |
| 文件大小： | 1482K |
| 代理商： | P89LPC9321FDH |
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P89LPC9321
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 16 November 2010
42 of 71
NXP Semiconductors
P89LPC9321
8-bit microcontroller with accelerated two-clock 80C51 core
7.26 Analog comparators
Two analog comparators are provided on the P89LPC9321. Input and output options
allow use of the comparators in a number of different configurations. Comparator
operation is such that the output is a logical one (which may be read in a register and/or
routed to a pin) when the positive input (one of two selectable inputs) is greater than the
negative input (selectable from a pin or an internal reference voltage). Otherwise the
output is a zero. Each comparator may be configured to cause an interrupt when the
output value changes.
The positive inputs of comparators could be amplified by Programmable Gain Amplifier 1
(PGA1) module. The PGA1 can supply gain factors of 2x, 4x, 8x, or 16x, eliminating the
need for external op-amps in the end application.
The overall connections to both comparators are shown in Figure 19. The comparators
function to VDD =2.4 V.
When each comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10
μs. The corresponding comparator interrupt should not be
enabled during that time, and the comparator interrupt flag must be cleared before the
interrupt is enabled in order to prevent an immediate interrupt service.
When a comparator is disabled the comparator’s output, COn, goes HIGH. If the
comparator output was LOW and then is disabled, the resulting transition of the
comparator output from a LOW to HIGH state will set the comparator flag, CMFn. This will
cause an interrupt if the comparator interrupt is enabled. The user should therefore
disable the comparator interrupt prior to disabling the comparator. Additionally, the user
should clear the comparator flag, CMFn, after disabling the comparator.
Fig 18. SPI single master multiple slaves configuration
002aaa903
master
slave
8-BIT SHIFT
REGISTER
SPI CLOCK
GENERATOR
8-BIT SHIFT
REGISTER
MISO
MOSI
SPICLK
port
MISO
MOSI
SPICLK
SS
slave
8-BIT SHIFT
REGISTER
MISO
MOSI
SPICLK
SS
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相关代理商/技术参数 |
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|---|---|
| P89LPC9321FDH,512 | 功能描述:8位微控制器 -MCU 8B MCU 2-CLOCK 80C51 8KB 3V 512B EEPROM RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC9321FDH,518 | 功能描述:8位微控制器 -MCU Enhanced LPC932A1 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC9321FN | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM |
| P89LPC9321FN,112 | 功能描述:8位微控制器 -MCU Enhanced LPC932A1 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC932A1 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-Bit Microcontroller with accelerated two-clock 80C51 core 8kB 3V byte-erasable flash with 512-byte data EEPROM |
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