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| 型号： | P89LPC9321FDH |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM |
| 中文描述： | 8-BIT, FLASH, 18 MHz, MICROCONTROLLER, PDSO28 |
| 封装： | 4.40 MM, PLASTIC, MO-153, SOT361-1, TSSOP-28 |
| 文件页数： | 52/71页 |
| 文件大小： | 1482K |
| 代理商： | P89LPC9321FDH |
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P89LPC9321
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 16 November 2010
56 of 71
NXP Semiconductors
P89LPC9321
8-bit microcontroller with accelerated two-clock 80C51 core
Table 12.
Dynamic characteristics (18 MHz)
VDD = 3.0 V to 3.6 V unless otherwise specified.
Symbol
Parameter
Conditions
Variable clock
fosc =18MHz
Unit
Min
Max
Min
Max
fosc(RC)
internal RC oscillator
frequency
nominal f = 7.3728 MHz
trimmed to
±1% at
Tamb =25 °C; clock
doubler option = OFF
(default)
7.189
7.557
7.189
7.557
MHz
nominal f = 14.7456 MHz;
clock doubler option = ON
14.378
15.114
14.378 15.114 MHz
fosc(WD)
internal watchdog
oscillator frequency
Tamb =25 °C
380
420
380
420
kHz
fosc
oscillator frequency
0
18
-
MHz
Tcy(clk)
clock cycle time
see Figure 22
55
-
ns
fCLKLP
low-power select clock
frequency
08
-
MHz
Glitch filter
tgr
glitch rejection time
P1.5/RST pin
-
50
-
50
ns
any pin except P1.5/RST
-
15
-
15
ns
tsa
signal acceptance time
P1.5/RST pin
125
-
125
-
ns
any pin except P1.5/RST
50
-
50
-
ns
External clock
tCHCX
clock HIGH time
see Figure 22
22
Tcy(clk) tCLCX
22
-
ns
tCLCX
clock LOW time
see Figure 22
22
Tcy(clk) tCHCX
22
-
ns
tCLCH
clock rise time
see Figure 22
-5
-
5
ns
tCHCL
clock fall time
see Figure 22
-5
-
5
ns
Shift register (UART mode 0)
TXLXL
serial port clock cycle
time
see Figure 21
16Tcy(clk)
-
888
-
ns
tQVXH
output data set-up to
clock rising edge time
see Figure 21
13Tcy(clk)
-
722
-
ns
tXHQX
output data hold after
clock rising edge time
see Figure 21
-Tcy(clk) + 20
-
75
ns
tXHDX
input data hold after
clock rising edge time
see Figure 21
-0
-
0
ns
tXHDV
input data valid to clock
rising edge time
see Figure 21
150
-
150
-
ns
SPI interface
fSPI
SPI operating frequency
slave
0
CCLK
6
03.0
MHz
master
-
CCLK
4
-4.5
MHz
TSPICYC
SPI cycle time
slave
6
CCLK
-
333
-
ns
master
4
CCLK
-
222
-
ns
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相关代理商/技术参数 |
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|---|---|
| P89LPC9321FDH,512 | 功能描述:8位微控制器 -MCU 8B MCU 2-CLOCK 80C51 8KB 3V 512B EEPROM RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC9321FDH,518 | 功能描述:8位微控制器 -MCU Enhanced LPC932A1 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC9321FN | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM |
| P89LPC9321FN,112 | 功能描述:8位微控制器 -MCU Enhanced LPC932A1 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC932A1 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-Bit Microcontroller with accelerated two-clock 80C51 core 8kB 3V byte-erasable flash with 512-byte data EEPROM |
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