参数资料
型号: P89LPC952FBD,157
厂商: NXP Semiconductors
文件页数: 15/69页
文件大小: 0K
描述: IC 80C51 MCU FLASH 8K 44-LQFD
产品培训模块: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
标准包装: 800
系列: LPC900
核心处理器: 8051
芯体尺寸: 8-位
速度: 18MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 40
程序存储器容量: 8KB(8K x 8)
程序存储器类型: 闪存
RAM 容量: 512 x 8
电压 - 电源 (Vcc/Vdd): 2.4 V ~ 3.6 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-LQFP
包装: 托盘
产品目录页面: 706 (CN2011-ZH PDF)
配用: 622-1016-ND - BOARD FOR P89LPC952FA 44-PLCC
622-1008-ND - BOARD FOR LPC9103 10-HVSON
OM10075-ND - EVAL BOARD FOR LPC952
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名称: 568-2014-5
935280152157
P89LPC952FBD
P89LPC952FDH-S
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P89LPC952_954_4
NXP
B
.V
.2008.
All
r
ights
reser
v
ed.
Pr
oduct
data
sheet
Re
v
.04
24
J
u
ly
2008
22
of
69
NXP
Semiconductor
s
P89LPC952/954
8-bit
micr
ocontr
oller
with
10-bit
ADC
[1]
Extended SFRs are physically located on-chip but logically located in external data memory address space (XDATA). The MOVX A,@DPTR and MOVX @DPTR,A instructions are
used to access these extended SFRs.
[2]
BRGR1_1 and BRGR0_1 must only be written if BRGEN_1 in BRGCON_1 SFR is logic 0. If any are written while BRGEN_1 = 1, the result is unpredictable.
AD0DAT7L
ADC0 data register 7, left
(MSB)
FFF1H
AD0DAT7[9:2]
BNDSTA0
ADC0 boundary status
register
FFEDH
BRGCON_1
Baud rate generator 1
control
FFB3H
-
SBRGS_1 BRGEN_1 00[2]
xxxx xx00
BRG0_1
Baud rate generator 1 rate
low
FFB4H
BRG1_1
Baud rate generator 1 rate
high
FFB5H
FREEZE
Peripheral clock freeze
FFD0H
-
RTC_F
CCU_F
WDT_F
T1_F
T0_F
00
xxx0 0000
P4M1
Port 4 output mode 1
FFB8H
(P4M1.7) (P4M1.6) (P4M1.5) (P4M1.4) (P4M1.3) (P4M1.2)
(P4M1.1)
(P4M1.0)
FF[1] 1111 1111
P4M2
Port 4 output mode 2
FFB9H
(P4M2.7) (P4M2.6) (P4M2.5) (P4M2.4) (P4M2.3) (P4M2.2)
(P4M2.1)
(P4M2.0)
00[1]
0000 0000
P5M1
Port 5 output mode 1
FFBAH (P5M1.7) (P5M1.6) (P5M1.5) (P5M1.4) (P5M1.3) (P5M1.2)
(P5M1.1)
(P5M1.0)
FF[1] 1111 1111
P5M2
Port 5 output mode 3
FFBBH (P5M2.7) (P5M2.6) (P5M2.5) (P5M2.4) (P5M2.3) (P5M2.2)
(P5M2.1)
(P5M2.0)
00[1]
0000 0000
S1ADDR
Serial port 1 address
register
FFB2H
00
0000 0000
S1ADEN
Serial port 1 address
enable
FFB1H
00
0000 0000
S1BUF
Serial port 1 data buffer
register
FFB0H
xx
xxxx xxxx
Table 5.
Extended special function registers …continued
Name
Description
SFR
addr.
Bit functions and addresses
Reset value
MSB
LSB
Hex
Binary
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