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参数资料
| 型号： | P89LPC985FDH,529 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 35/85页 |
| 文件大小： | 0K |
| 描述： | IC 80C51 MCU KB FLASH 28TSSOP |
| 标准包装： | 51 |
| 系列： | LPC900 |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 18MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 26 |
| 程序存储器容量： | 8KB（8K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 512 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.4 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 管件 |
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P89LPC980_982_983_985
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 15 June 2010
40 of 85
NXP Semiconductors
P89LPC980/982/983/985
8-bit microcontroller with accelerated two-clock 80C51 core
7.16.1.3
Input-only configuration
The input-only port configuration has no output drivers. It is a Schmitt trigger input that
also has a glitch suppression circuit.
7.16.1.4
Push-pull output configuration
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output. A push-pull port pin has a
Schmitt triggered input that also has a glitch suppression circuit. The
P89LPC980/982/983/985 device has high current source on eight pins in push-pull mode.
7.16.2 Port 0 analog functions
The P89LPC980/982/983/985 incorporates two Analog Comparators. In order to give the
best analog function performance and to minimize power consumption, pins that are being
used for analog functions must have the digital outputs and digital inputs disabled.
Digital outputs are disabled by putting the port output into the Input-Only
(high-impedance) mode.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register, bits 1:5.
On any reset, PT0AD[1:5] defaults to logic 0s to enable digital functions.
7.16.3 Additional port features
After power-up, all pins are in Input-Only mode. Please note that this is different from
the LPC76x series of devices.
After power-up, all I/O pins except P1.5, may be configured by software.
Pin P1.5 is input only. Pins P1.2 and P1.3 are configurable for either input-only or
open-drain.
Every output on the P89LPC980/982/983/985 has been designed to sink typical LED
drive current. However, there is a maximum total output current for all ports which must
not be exceeded. Please refer to Table 13 “Static characteristics” for detailed
specifications.
All ports pins that can function as an output have slew rate controlled outputs to limit noise
generated by quickly switching output signals. The slew rate is factory-set to
approximately 10 ns rise and fall times.
7.16.4 Pin remap
This feature allows the functions of UART/I2C/SPI to be remapped to other pins.
Configuration register controls the multiplexers to allow connection between the pins and
the on chip peripherals. See Table 10 “SPI/I2C/UART pin remap”.
UART/I2C/SPI, each has two options of pin configuration: primary pin map and alternative
pin map. After reset, UART/I2C/SPI chooses the primary pin map as default. User can
adjust to the alternative pin map through configuring PINCON register according to the
application.
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