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参数资料
| 型号： | P89V664FA,512 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 11/90页 |
| 文件大小： | 0K |
| 描述： | IC 80C51 MCU FLASH 64K 44-PLCC |
| 产品培训模块： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 标准包装： | 26 |
| 系列： | 89V |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 40MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 36 |
| 程序存储器容量： | 64KB（64K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 2K x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LCC（J 形引线） |
| 包装： | 管件 |
| 产品目录页面： | 706 (CN2011-ZH PDF) |
| 配用： | 622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP |
| 其它名称： | 568-2436-5 935280834512 P89V664FA |
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P89V660_662_664
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3.1 — 17 October 2011
19 of 90
NXP Semiconductors
P89V660/662/664
80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI
6.3.3 Boot block
When the microcontroller programs its own flash memory, all of the low level details are
handled by code (bootloader) that is contained in a Boot block. A user program calls the
common entry point in the Boot block with appropriate parameters to accomplish the
desired operation. Boot block operations include erase user code, program user code,
program security bits, chip erase, etc. The Boot block logically overlays the program
memory space from FC00H to FFFFH, when it is enabled. The Boot block may be
disabled on-the-fly so that the upper 1 kB of user code is available to the user’s program.
6.3.4 Power-on reset code execution
The P89V660/662/664 contains two special flash elements: the Boot Vector and the Boot
Status bit. Following reset, the P89V660/662/664 examines the contents of the Boot
Status bit. If the Boot Status bit is set to zero, power-up execution starts at location 0000H,
which is the normal start address of the user’s application code. When the Boot Status bit
is set to a value other than zero, the contents of the Boot Vector are used as the high byte
of the execution address and the low byte is set to 00H
Table 10 shows the factory default Boot Vector setting for this device. A factory-provided
bootloader is pre-programmed into the address space indicated and uses the indicated
boot loader entry point to perform ISP functions.
6.3.5 Hardware activation of the bootloader
The bootloader can also be executed by forcing the device into ISP mode during a
power-on sequence. This has the same effect as having a non-zero status byte. This
allows an application to be built that will normally execute user code but can be manually
forced into ISP operation. If the factory default setting for the boot vector (FCH) is
changed, it will no longer point to the factory pre-programmed ISP bootloader code. After
programming the flash, the status byte should be programmed to zero in order to allow
execution of the user’s application code beginning at address 0000H.
6.3.6 ISP
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89V660/662/664 through the serial port. This
firmware is provided by NXP and embedded within each P89V660/662/664 device. The
NXP ISP facility has made in-circuit programming in an embedded application possible
with a minimum of additional expense in components and circuit board area. The ISP
function uses five pins (VDD, VSS, TXD, RXD, and RST). Only a small connector needs to
be available to interface your application to an external circuit in order to use this feature.
6.3.7 Using ISP
The ISP feature allows for a wide range of baud rates to be used in your application,
independent of the oscillator frequency. It is also adaptable to a wide range of oscillator
frequencies. This is accomplished by measuring the bit-time of a single bit in a received
character. This information is then used to program the baud rate in terms of timer counts
Table 10.
Default boot vector values and ISP entry points
Device
Default boot vector
Default bootloader
entry point
Default bootloader code
range
P89V660/662/664
FCH
FC00H
FC00H to FFFFH
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相关代理商/技术参数 |
参数描述 |
|---|---|
| P89V664FBC | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI |
| P89V664FBC,557 | 功能描述:8位微控制器 -MCU 80C51 64K FL / 2K RM RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89V664FBC557 | 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 40MHZ TQFP-44 |
| P8-A000001 | 制造商:OTTO Engineering Inc 功能描述:P8-A141313 EXCEPT |
| P8-A000003 | 制造商:OTTO Engineering Inc 功能描述:P8-A121213 WITH |
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