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参数资料
| 型号： | PA28F400B5T80 |
| 厂商： | INTEL CORP |
| 元件分类： | PROM |
| 英文描述： | SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT |
| 中文描述： | 512K X 8 FLASH 5V PROM, 80 ns, PDSO44 |
| 封装： | 0.525 X 1.110 INCH, PLASTIC, SOP-44 |
| 文件页数： | 15/38页 |
| 文件大小： | 501K |
| 代理商： | PA28F400B5T80 |
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E
SMART 5 BOOT BLOCK MEMORY FAMILY
15
ADVANCE INFORMATION
Table 3. Bus Operations for Word-Wide Mode (BYTE# = V
IH
)
Mode
Notes
RP#
CE#
OE#
WE#
A
9
A
0
V
PP
DQ
0
–15
Read
1,2,3
V
IH
V
IL
V
IL
V
IH
X
X
X
D
OUT
Output Disable
V
IH
V
IL
V
IH
V
IH
X
X
X
High Z
Standby
V
IH
V
IH
X
X
X
X
X
High Z
Deep Power-Down
9
V
IL
X
X
X
X
X
X
High Z
Intelligent Identifier
(Mfr.)
4
V
IH
V
IL
V
IL
V
IH
V
ID
V
IL
X
0089 H
Intelligent Identifier
(Device)
4,5
V
IH
V
IL
V
IL
V
IH
V
ID
V
IH
X
See
Table 4
Write
6,7,8
V
IH
V
IL
V
IH
V
IL
X
X
X
D
IN
Table 4. Bus Operations for Byte-Wide Mode (BYTE# = V
IL
)
Mode
Note
RP#
CE#
OE#
WE#
A
9
A
0
A
–1
V
PP
DQ
0–7
DQ
8–14(10)
Read
1,2,3
V
IH
V
IL
V
IL
V
IH
X
X
X
X
D
OUT
High Z
Output
Disable
V
IH
V
IL
V
IH
V
IH
X
X
X
X
High Z
High Z
Standby
V
IH
V
IH
X
X
X
X
X
X
High Z
High Z
Deep
Power-
Down
9
V
IL
X
X
X
X
X
X
X
High Z
High Z
Intelligent
Identifier
(Mfr.)
4
V
IH
V
IL
V
IL
V
IH
V
ID
V
IL
X
X
89H
High Z
Intelligent
Identifier
(Device)
4,5
V
IH
V
IL
V
IL
V
IH
V
ID
V
IH
X
X
See
Table 4
High Z
Write
6,7,8
V
IH
V
IL
V
IH
V
IL
X
X
X
X
D
IN
High Z
NOTES:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. This column does not apply to the E28F004B5 since it is a x8-only device.
Refer to DC Characteristics
X can be V
IL
, V
IH
for control pins and addresses, V
PPLK
or V
PPH
for V
PP
.
See DC Characteristicsfor V
PPLK
, V
PPH1
, V
PPH2
, V
HH
, V
ID
voltages.
Manufacturer and device codes may also be accessed via a CUI write sequence, A
0
selects, all other addresses = X.
See Table 4 for device IDs.
Refer to Table 6 for valid D
IN
during a write operation.
Command writes for block erase or program are only executed when V
PP
= V
PPH1
or V
PPH2
.
To program or erase the boot block, hold RP# at V
HH
or WP# at V
IH
. See Section 3.3.
RP# must be at GND ± 0.2 V to meet the maximum deep power-down current specified.
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