参数资料
型号: PALCE20V8H-7PC/5
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: PLD
英文描述: EE CMOS 24-Pin Universal Programmable Array Logic
中文描述: EE PLD, 7.5 ns, PDIP24
封装: 0.300 INCH, SKINNY, PLASTIC, DIP-24
文件页数: 16/25页
文件大小: 479K
代理商: PALCE20V8H-7PC/5
PALCE20V8 Family
23
USE
GAL
DEVICES
FOR
NEW
DESIGNS
TYPICAL THERMAL CHARACTERISTICS
Measured at 25
°C ambient. These parameters are not tested.
Plastic
θ
jc Considerations
The data listed for plastic
θ
jc are for reference only and are not recommended for use in calculating junction temperatures. The
heat-ow paths in plastic-encapsulated devices are complex, making the
θ
jc measurement relative to a specic location on the pack-
age surface. Tests indicate this measurement reference point is directly below the die-attach area on the bottom center of the package.
Furthermore,
θ
jc tests on packages are performed in a constant-temperature bath, keeping the package surface at a constant tem-
perature. Therefore, the measurements can only be used in a similar environment.
Parameter
Symbol
Parameter Description
Typ
Unit
PDID
PLCC
θ
jc
Thermal impedance, junction to case
19
°C/W
θ
ja
Thermal impedance, junction to ambient
73
55
°C/W
θ
jma
Thermal impedance, junction to ambient with air ow
200 lfpm air
61
45
°C/W
400 lfpm air
53
41
°C/W
600 lfpm air
50
38
°C/W
800 lfpm air
47
36
°C/W
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