参数资料
型号: PBL386402QNT
厂商: ERICSSON
英文描述: Subscriber Line Interface Circuit
中文描述: 用户线接口电路
文件页数: 9/16页
文件大小: 138K
代理商: PBL386402QNT
PBL 386 40/2
9
SLIC Operating States
State
C3
C2
C1
SLIC operating state
Active detector
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Open circuit
Ringing state
Active state
Active state
Tip open state
Active state
Active reverse
Active reverse
-
Ring trip detector (active low)
Loop detector (active low)
Line voltage measurement (note 9)
Loop detector (active low)
Ground key detector (active high)
Loop detector (active low)
Ground key detector (active high)
Table 1. SLIC operating states.
15
16
17
18
C3
C2
C1
DET
C1, C2 and C3 are digital inputs (internal pull-up) controlling the SLIC operating states.
Refer to section "Operating states" for details.
Det
ector output. Active low when indicating loop detection and ring trip, active high when indicating
ground key detection.
N
o internal
C
onnection
+5 V power supply.
P
rogrammable
L
oop
D
etector threshold. The loop detection threshold is programmed by a resistor
connected from this pin to AGND.
P
rogrammable
O
verhead
V
oltage. If pin is left open: The overhead voltage is internally set to min 2.7 V in
off-hook and min 1.1 V in On-hook. If a resistor is connected between this pin and AGND: the overhead
voltage can be set to higher values.
P
rog.
L
ine
C
urrent, the current limit, reference C in figure 13, is programmed by a resistor connected
from this pin to AGND.
A
Ref
erence, 49.9 k
, resistor should be connected from this pin to AGND.
N
o internal
C
onnection
R
eceive
S
umming
N
ode. 200 times the AC-current flowing into this pin equals the metallic (transversal)
AC-current flowing from RINGX to TIPX. Programming networks for two-wire impedance and receive
gain connect to the receive summing node. A resistor should be connected from this pin to AGND.
Analog Ground, should be tied together with BGND.
Transmit vf output. The AC voltage difference between TIPX and RINGX, the AC metallic voltage, is
reproduced as an unbalanced GND referenced signal at VTX with a gain of one (or one half, see pin
PTG). The two-wire impedance programming network connects between VTX and RSN.
19
20
21
NC
VCC
PLD
22
POV
23
PLC
24
25
26
REF
NC
RSN
27
28
AGND
VTX
}
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