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参数资料
| 型号： | PC13892VLR2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA186 |
| 封装： | 12 X 12 MM, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-186 |
| 文件页数： | 57/75页 |
| 文件大小： | 3848K |
| 代理商： | PC13892VLR2 |
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Analog Integrated Circuit Device Data
60
Freescale Semiconductor
13892
FUNCTIONAL DEVICE OPERATION
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: MC13892VK and MC13892VL in 139, 186 MAPBGA packages.
CHARGE LED INDICATOR
Since normal LED control via the SPI bus is not always
possible in the standalone operation, a current sink is
provided at the CHRGLED pin. The driver at CHRGLED
serves as the trickle (sign of life) LED and will be activated
when standalone charging is started, and will remain on also
when the device is powered on, until the charger is
programmed by SPI.
MODES OF OPERATION
REVERSE SUPPLY MODE
The battery voltage can be applied to an external
accessory via the charge path. The path is only established if
the normal charge path is disabled. The turn on of M1 and M2
is intentionally slow. The current through the accessory
supply path is monitored via the charge path sense resistor
R2. It can be read out via the ADC. The accessory supply
path is disabled and an interrupt CHGSHORTI is generated
when the slow threshold or the fast threshold is crossed. The
reverse path is disabled when a current reversal occurs, and
an interrupt CHREVI is generated. This function operates up
to 40°C.
STANDALONE CHARGING
A standalone charge mode of operation is provided to
minimize software interaction. It also allows that a completely
discharged battery can be revived without processor control.
This is especially important when charging from a USB host
or when the optional transistor M3 is not placed.
SOFTWARE CONTROLLED CHARGING
The charger can also be operated under software control.
In this mode, full control of the charger settings is assumed
by software; the state machine will no longer determine the
mode of charging.
FACTORY MODE
In factory mode, power is provided to the application with
no battery present. It is not a situation which should occur in
the field. The factory mode is differentiated from a USB Host
by, in addition to a valid VBUS, a UID being pulled high to
VBUS level during the attach, See Connectivity (USB
USB LOW POWER BOOT
USB low power boot allows the application to boot with a
dead battery within the 100 mA USB budget, until the
processor has negotiated for the full current capability. This
mode expedites the charging of the dead battery and allows
the software to bring up the LCD display screen with the
message “Charging battery”.
PROTECTION FUNCTIONS
OVER-VOLTAGE PROTECTION
In order to protect the application, the voltage at the
CHRGRAW pin is monitored. When crossing the threshold
(16 V high to low and low to high), the charge path regulator
will be turned off by opening the mosfets connected to pins
CHRGCTRL1 and CHRGCTRL2. An interrupt CHGFAULTI
is generated with the associated CHGFAULTM mask bit. In
order to ensure immediate protection, the control of M1, M2,
and M3 occurs in real time.
The UVBUS pin is also protected against over-voltages.
This will occur at much lower levels then for CHRGRAW.
When a VBUS over-voltage is detected the internal circuitry
of the USB block is disconnected. An USBOVI is generated
in this case.
When the maximum voltage of the IC is exceeded,
damage will occur to the IC, and the state of the mosfets
connected to pins CHRGCTRL1 and CHRGCTRL2 cannot
be guaranteed. If one wants to protect against these failure
conditions, additional protection will be required. The same is
valid for charger polarity inversion protection.
OVER-POWER DISSIPATION PROTECTION
Since the charge path operates in a linear fashion, the
dissipation can be significant and care must be taken to
ensure that the external pass FETs M1 and M2 are not over
dissipating when charging. By default, the charge system will
protect against this by a built in power limitation circuit.This
circuit will monitor the voltage drop between CHRGRAW and
CHRGISNS, and the current through the external sense
resistor connected between CHRGISNS and BPSNS. When
required, a duty cycle is applied to the FETs connected on
CHRGCTRL1 and CHRGCTRL2, and thus the charge
current, in order to stay within the power budget. At the same
time the FET connected to BATTFET pin is forced to conduct
to keep the application powered. In case of excessive supply
conditions, the power limiter minimum duty cycle may not be
sufficiently small to maintain the actual power dissipation
within budget. In that case, the charge path will be disabled
and the CHGFAULTI interrupt generated.
The power budget can be programmed by the SPI through
the PLIM[1:0] bits, which establishes a power limit from 600
to 1200 mW in 200 mV steps. The power dissipation limiter
can be disabled by setting the PLIMDIS bit. In this case, it is
advised to use close software control to estimate the
dissipated power in the external pass FETs. The power
limiter is automatically disabled in serial path factory mode
and in reverse mode.
Since a charger attachment can be a Turn On event when
a product is initially in the Off state, any nondefault settings
that are intended for PLIM[1:0] and PLIMDIS should be
programmed early in the configuration sequence to ensure
proper supply conditions adapted to the application. To avoid
any false detection during power up, the power limiter output
is blanked at the start of the charge cycle. As a safety
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