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参数资料
| 型号： | PC16552DV |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Dual Universal Asynchronous Receiver/Transmitter with FIFOs |
| 中文描述： | 2 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQCC44 |
| 封装： | PLASTIC, CC-44 |
| 文件页数： | 1/21页 |
| 文件大小： | 291K |
| 代理商： | PC16552DV |
TL/C/9426
P
June 1995
PC16552D
Dual Universal Asynchronous
Receiver/Transmitter with FIFOs
2
General Description
The PC16552D is a dual version of the PC16550D Universal
Asynchronous Receiver/Transmitter (UART). The two serial
channels are completely independent except for a common
CPU interface and crystal input. On power-up both channels
are functionally identical to the 16450
*
. Each channel can
operate with on-chip transmitter and receiver FIFOs (FIFO
mode) to relieve the CPU of excessive software overhead.
In FIFO mode each channel is capable of buffering 16 bytes
(plus 3 bits of error data per byte in the RCVR FIFO) of data
in both the transmitter and receiver. All the FIFO control
logic is on-chip to minimize system overhead and maximize
system efficiency.
Signalling for DMA transfers is done through two pins per
channel (TXRDY and RXRDY). The RXRDY function is mul-
tiplexed on one pin with the OUT 2 and BAUDOUT func-
tions. The CPU can select these functions through a new
register (Alternate Function Register).
Each channel performs serial-to-parallel conversion on data
characters received from a peripheral device or a MODEM,
and parallel-to-serial conversion on data characters re-
ceived from the CPU. The CPU can read the complete
status of each channel at any time. Status information re-
ported includes the type and condition of the transfer opera-
tions being performed by the DUART, as well as any error
conditions (parity, overrun, framing, or break interrupt).
The DUART includes one programmable baud rate genera-
tor for each channel. Each is capable of dividing the clock
input by divisors of 1 to (2
16
b
1), and producing a 16
c
clock for driving the internal transmitter logic. Provisions are
also included to use this 16
c
clock to drive the receiver
logic. The DUART has complete MODEM-control capability,
and a processor-interrupt system. Interrupts can be pro-
grammed to the user’s requirements, minimizing the com-
puting required to handle the communications link.
The DUART is fabricated using National Semiconductor’s
advanced M
2
CMOS
TM
.
Features
Y
Dual independent UARTs
Y
Capable of running all existing 16450 and PC16550D
software
Y
After reset, all registers are identical to the 16450 reg-
ister set
Y
Read and write cycle times of 84 ns
Y
In the FIFO mode transmitter and receiver are each
buffered with 16-byte FIFOs to reduce the number of
interrupts presented to the CPU
Y
Holding and shift registers in the 16450 Mode eliminate
the need for precise synchronization between the CPU
and serial data
Y
Adds or deletes standard asynchronous communication
bits (start, stop, and parity) to or from the serial data
Y
Independently controlled transmit, receive, line status,
and data set interrupts
Y
Programmable baud generators divide any input clock
by 1 to (2
16
b
1) and generate the 16
c
clock
Y
MODEM control functions (CTS, RTS, DSR, DTR, RI,
and DCD)
Y
Fully programmable serial-interface characteristics:
D 5-, 6-, 7-, or 8-bit characters
D Even, odd, or no-parity bit generation and detection
D 1-, 1
(/2
-, or 2-stop bit generation
D Baud generation (DC to 1.5M baud) with 16
c
clock
Y
False start bit detection
Y
Complete status reporting capabilities
Y
TRI-STATE
é
TTL drive for the data and control buses
Y
Line break generation and detection
Y
Internal diagnostic capabilities:
D Loopback controls for communications link fault
isolation
D Break, parity, overrun, framing error simulation
Y
Full prioritized interrupt system controls
*
Can also be reset to 16450 Mode under software control.
2
Note: This part is patented.
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation
M
2
CMOS
TM
is a trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
RRD-B30M75/Printed in U. S. A.
相关PDF资料 |
PDF描述 |
|---|---|
| PC16553 | WRISTLOCK TERMINAL |
| PC16553V | Dual Universal Asynchronous Receiver/Transmitter with FIFOs plus High Performance Parallel Interface |
| PC21100 | KPTC 8C 8#16 PIN PLUG |
| PC33094DW | IGNITION CONTROL |
| PC33253DW | Full Bridge Pre-Driver |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PC16552DV NS024AV (AND AJ) | 制造商:Texas Instruments 功能描述: |
| PC16552DV | 制造商:Texas Instruments 功能描述:DUAL UART FIFO SMD 16552 PLCC44 |
| PC16552DV/NOPB | 功能描述:UART 接口集成电路 DUAL UNIV ASYNCHRON RCVR/TRANS W/ FIFO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| PC16552DVX | 功能描述:UART 接口集成电路 RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| PC16552DVX(PBF) | 制造商:National Semiconductor Corporation 功能描述: |
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