MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33888
15
CONTROL INTERFACE
Input Logic High Voltage
(Note 22)
V
IH
0.7V
DD
–
–
V
Input Logic Low Voltage
(Note 22)
V
IL
–
–
1.0
V
Input Logic Voltage Hysteresis (SI,
CS
, SCLK, IHS[0:3], ILS)
(Note 23)
V
IN(HYS)
100
350
750
mV
Input Logic Pulldown Current (SI, SCLK, IHS[0:3], ILS, WDIN)
I
DWN
5.0
–
20
μ
A
Input Logic Pulldown Resistor (WAKE,
RST
)
R
DWN
100
200
400
k
Input Logic Pullup Current (
CS
, V
IN
= 0.7 V
DD
)
(Note 24)
I
UPC
5.0
–
20
μ
A
Input Logic Pullup Current (FSI, V
IN
= 3.5 V)
I
UPF
5.0
–
20
μ
A
Wake Input Clamp Voltage (I
WICI
< 2.5 mA)
(Note 25)
V
WIC
7.0
–
14
V
Wake Input Forward Voltage (I
WICI
= -2.5 mA)
V
WIF
-2.0
–
-0.3
V
SO High-State Output Voltage (I
OH
= 1.0 mA)
V
SOH
0.8 V
DD
–
–
V
FS
, SO Low-State Output Voltage (I
OL
= -1.6 mA)
V
SOL
–
0.2
0.4
V
SO Tri-State Leakage Current (
CS
≥
3.5 V)
I
SOLK
-5.0
0
5.0
μ
A
Input Capacitance
(Note 26)
C
IN
–
4.0
12
pF
SO,
FS
Tri-State Capacitance
(Note 23)
C
SO
–
–
20
pF
Notes
22.
Upper and lower logic threshold voltage range applies to SI,
CS
, SCLK,
RST
, IHS[0:3], ILS, WAKE, and WDIN input signals. The WAKE,
FSI, and
RST
signals are derived from an internal supply.
Parameter is guaranteed by design but is not production tested.
CS
is pulled up to V
DD
.
The current must be limited by a series resistor when using voltages higher than the W
ICV
.
Input capacitance of SI,
CS
, SCLK,
RST
, IHS[0:3], ILS, WAKE, and WDIN. This parameter is guaranteed by process monitoring but is not
production tested.
23.
24.
25.
26.
STATIC ELECTRICAL CHARACTERISTICS (continued)
Characteristics noted under conditions 6.0 V
≤
V
PWR
≤
27 V, 4.5 V
≤
V
DD
≤
5.5 V, -40
°
C
≤
T
J
≤
150
°
C unless otherwise noted. Typical
values noted reflect the approximate parameter mean at T
A
= 25
°
C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.