参数资料
型号: PCA8575BQ,118
厂商: NXP Semiconductors
文件页数: 5/30页
文件大小: 0K
描述: IC I/O EXPANDER I2C 16B 24DHVQFN
标准包装: 3,000
接口: I²C
输入/输出数: 16
中断输出:
频率 - 时钟: 400kHz
电源电压: 2.3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-VFQFN 裸露焊盘
供应商设备封装: 24-DHVQFN(5.5x3.5)
包装: 带卷 (TR)
包括: POR
其它名称: 935283506118
PCA8575BQ-T
PCA8575BQ-T-ND
PCA8575_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 21 March 2007
13 of 30
NXP Semiconductors
PCA8575
Remote 16-bit I/O expander for I2C-bus with interrupt
9.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up and hold
times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 17. System conguration
002aaa966
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
I2C-BUS
MULTIPLEXER
SLAVE
Fig 18. Acknowledgement on the I2C-bus
002aaa987
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from master
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