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参数资料
型号： PCA9575PW2,118
厂商： NXP Semiconductors
文件页数： 2/38页
文件大小： 0K
描述： IC I2C/SMBUS 16BIT GPIO 28TSSOP
产品培训模块： I²C Bus Fundamentals
特色产品： NXP - I2C Interface
标准包装： 1
接口： I²C，SM 总线
输入/输出数： 16
中断输出： 是
频率 - 时钟： 400kHz
电源电压： 1.1 V ~ 3.6 V
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 28-TSSOP（0.173"，4.40mm 宽）
供应商设备封装： 28-TSSOP
包装： 标准包装
包括： POR
其它名称： 568-6647-6
PCA9575_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 9 November 2009
10 of 38
NXP Semiconductors
PCA9575
16-bit I2C-bus and SMBus, level translating, low voltage GPIO
7.5 Writing to port registers
Data is transmitted to the PCA9575 by sending the device address and setting the least
signicant bit to logic 0 (see Figure 6 or Figure 7 for device address). The command byte
is sent after the address and determines which register will receive the data following the
command byte. Each 8-bit register may be updated independently of the other registers.
7.6 Reading the port registers
In order to read data from the PCA9575, the bus master must rst send the PCA9575
address with the least signicant bit set to a logic 0 (see Figure 6 or Figure 7 for device
address). The command byte is sent after the address and determines which register will
be accessed. After a restart, the device address is sent again but this time, the least
signicant bit is set to logic 1. Data from the register dened by the command byte will
then be sent by the PCA9575. Data is clocked into the register on the falling edge of the
acknowledge clock pulse. After the rst byte is read, additional bytes may be read using
the auto-increment feature.
7.6.1 Register 0 - Input port 0 register
This register is read-only. It reects the incoming logic levels of the pins, regardless of
whether the pin is dened as an input or an output by the Conguration register. Writes to
this register will be acknowledged but will have no effect.
The default ‘X’ is determined by the externally applied logic level.
0Dh
1
0
1
MSK1
read/write
Interrupt mask port 1 register
0Eh
1
0
INTS0
read only
Interrupt status port 0 register
0Fh
1
INTS1
read only
Interrupt status port 1 register
Table 3.
Register summary …continued
Register number
D3
D2
D1
D0
Name
Type
Function
Table 4.
Register 0 - Input port 0 register (address 00h) bit description
Bit
Symbol
Access
Value
Description
7
IO0.7
read only
X
determined by externally applied logic level
6
IO0.6
read only
X
5
IO0.5
read only
X
4
IO0.4
read only
X
3
IO0.3
read only
X
2
IO0.2
read only
X
1
IO0.1
read only
X
0
IO0.0
read only
X
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