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参数资料
| 型号： | PCF85132U/2DA/1,02 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 11/62页 |
| 文件大小： | 0K |
| 描述： | IC LCD DISPLAY DRVR UNCASED |
| 标准包装： | 600 |
| 显示器类型： | LCD |
| 配置： | 多重 |
| 接口： | I²C |
| 数字或字符： | 任何数字类型 |
| 电流 - 电源： | 60µA |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 模具 |
| 供应商设备封装： | 模具 |
| 包装： | 散装 |
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NXP Semiconductors
PCF85132
LCD driver for low multiplex rates
Table 13. Blink frequencies
Assuming that f clk = 1.800 kHz.
f blink = ---------
f blink = ------------
f blink = ------------
Blink mode
off
1
2
3
Operating mode ratio
-
f clk
768
f clk
1536
f clk
3072
Blink frequency
blinking off
~2.34 Hz
~1.17 Hz
~0.59 Hz
An additional feature is for an arbitrary selection of LCD elements to blink. This applies to
the static and 1:2 multiplex drive modes and can be implemented without any
communication overheads: With the output bank selector, the displayed RAM banks are
exchanged (see Section 7.5.4 on page 25 ) with alternate RAM banks at the blink
frequency. This mode can also be specified by the blink-select command (see Table 11 on
In the 1:3 and 1:4 multiplex modes, where no alternate RAM bank is available, groups of
LCD elements can blink selectively by changing the display RAM data at fixed time
intervals.
The entire display can blink at a frequency other than the nominal blinking frequency. This
can be effectively performed by resetting and setting the display enable bit E at the
required rate using the mode-set command (see Table 6 ).
7.2 Power-On Reset (POR)
At power-on, the PCF85132 resets to the following starting conditions:
?
?
?
?
?
?
?
?
All backplane and segment outputs are set to V LCD
The selected drive mode is 1:4 multiplex with 1 ? 3 bias
Blinking is switched off
Input and output bank selectors are reset
The I 2 C-bus interface is initialized
The data pointer and the subaddress counter are cleared (set to logic 0)
The display is disabled (bit E = 0, see Table 6 on page 6 )
If internal oscillator is selected (pin OSC connected to V SS ), then there is no clock
signal on pin CLK
Remark: Do not transfer data on the I 2 C-bus for at least 1 ms after a power-on to allow
the reset action to complete.
7.3 Possible display configurations
The display configurations possible with the PCF85132 depend on the required number of
All of the display configurations given in Table 14 can be implemented in a typical system
PCF85132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 July 2013
? NXP B.V. 2013. All rights reserved.
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相关代理商/技术参数 |
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| PCF85133 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Universal LCD driver for low multiplex rates |
| PCF85133U/2DA/1 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Universal LCD driver for low multiplex rates |
| PCF85133U/2DA/1,02 | 功能描述:IC LCD DRIVER UNIV UNCASED DIE RoHS:是 类别:未定义的类别 >> 其它 系列:* 标准包装:1 系列:* 其它名称:MS305720A |
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