参数资料
型号: PE33361MLIAA
厂商: PEREGRINE SEMICONDUCTOR CORP
元件分类: PLL合成/DDS/VCOs
英文描述: PHASE LOCKED LOOP, QCC48
封装: 7 X 7 MM, GREEN, QFN-48
文件页数: 1/15页
文件大小: 344K
代理商: PE33361MLIAA
Document No. 70-0287-01
│ www.psemi.com
Page 1 of 15
2009 Peregrine Semiconductor Corp. All rights reserved.
Peregrine’s PE33361 is a high-performance integer-N PLL
capable of frequency synthesis up to 3500 MHz. The
device is designed for superior phase noise performance
with a direct, serial and parallel programming option.
The PE33361 features a 10/11 dual modulus prescaler,
counters and a phase comparator as shown in Figure 1.
Counter values are programmable through either a serial or
parallel interface and can also be directly hard wired.
The PE33361 is available in a 48-lead QFN and is
manufactured on Peregrine’s UltraCMOS process, a
patented variation of silicon-on-insulator (SOI) technology
on a sapphire substrate, offering excellent RF performance.
Advance Information
3500 MHz UltraCMOS Integer-N PLL
Product Description
PE33361
Features
Low Power - 45 mA at 3.3V
3500 MHz operation
÷10/11 dual modulus prescaler
Internal phase detector
Serial, parallel or hardwired
programmable
Ultra-Low Phase Noise: -216 dBc/Hz
Packaged in a 48-lead QFN
Figure 1. Block Diagram
F
in
F
inB
Prescaler
10 / 11
20
Main
Counter
20
Secon-
dary
20-bit
Latch
20
Primary
20-bit
Latch
Pre_enB
M(6:0)
A(3:0)
R(3:0)
16
20
R Counter
f
r
Phase
Detector
6
f
c
f
p
8
D(7:0)
13
Sdata
PD_UB
PD_DB
Applications
Cellular Base Stations
WiMax
CATV Equipment
Test & Measurement
Military Applications
Point-to-Point Radios
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