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参数资料
| 型号： | PEX8532-BCRDK |
| 厂商： | PLX Technology, Inc. |
| 英文描述： | Flexible & Versatile PCI Express⑩ Switch |
| 中文描述： | 柔性 |
| 文件页数： | 1/4页 |
| 文件大小： | 527K |
| 代理商： | PEX8532-BCRDK |
Flexible & Versatile PCI Express Switch
.
Features
PEX 8532 General Features
o
32-lane PCI Express switch
-
Integrated SerDes
o
Up to eight configurable ports
o
(x1, x2, x4, x8, x16)
o
35mmx35mm, 680 pin PBGA package
o
Typical Power: 5.7 Watts
PEX 8532 Key Features
o
Standard Compliant
-
PCI Express Base Specification, r1.1
o
High Performance
-
Non-blocking switch fabric
-
Full line rate on all ports
o
Non-Transparent Bridging
-
Configurable Non-Transparent port
for Multi-Host or Intelligent I/O
Support
o
Flexible Configuration
-
Eight highly flexible & configurable
ports (x1, x2, x4, x8, or x16)
-
Configurable with strapping pins,
EEPROM, or Host software
-
Lane and polarity reversal
o
PCI Express Power Management
-
Link power management states: L0,
L0s, L1, L2/L3 Ready, and L3
-
Device states: D0 and D3hot
o
Quality of Service (QoS)
-
Two Virtual Channels per port
-
Eight Traffic Classes per port
-
Fixed and Round-Robin Virtual
Channel Port Arbitration
o
Reliability, Availability,
Serviceability (RAS)
-
Eight Standard Hot-Plug Controllers
-
Upstream port as hot-plug client
-
Transaction Layer end-to-end CRC
-
Poison bit
-
Advanced Error Reporting
-
Per port performance monitoring
Average packet size
Number of packets
CRC errors and more
-
JTAG boundary scan
Multi-purpose, Feature Rich
ExpressLane
PCI Express Switch
The
ExpressLane
TM
PEX 8532 device offers PCI Express switching capability
enabling users to add scalable high bandwidth, non-blocking interconnection to a
wide variety of applications including
servers, storage systems, communications
platforms, blade servers,
and
embedded-control products
. The PEX 8532 is well
suited for
fan-out
,
aggregation, dual-graphics, peer-to-peer,
and
intelligent I/O
module
applications.
Highly Flexible Port Configurations
The
ExpressLane
PEX 8532 offers highly configurable ports. There are a maximum
of 8 ports that can be configured to any legal width from x1 to x16, in any
combination to support your specific bandwidth needs. The ports can be configured
for
symmetric
(each port having the same lane width and traffic load) or
asymmetric
(ports having different lane widths) traffic. In the event of asymmetric
traffic, the PEX 8532 features a
flexible central packet memory
that allocates a
memory buffer for each port as required by the application or endpoint. This buffer
allocation along with the device's
flexible packet flow control
minimizes
bottlenecks when the upstream and aggregated downstream bandwidths do not match
(are asymmetric). Any of the ports can be designated as the upstream port, which can
be changed dynamically.
End-to-end Packet Integrity
The PEX 8532 provides
end-to-end CRC
protection (ECRC) and
Poison
bit
support
to enable designs that require
end-to-end data integrity
. These features are optional
in the PCI Express specification, but PLX provides them across its entire
ExpressLane
switch product line.
Non-Transparent “Bridging” in a PCI Express Switch
The PEX 8532 product supports full non-transparent bridging functionality to allow
implementation of multi-host systems and intelligent I/O modules in applications
such as
communications
,
storage
, and
blade servers
. To ensure quick product
migration, the non-transparency features are implemented in the same fashion as in
standard PCI applications.
Non-transparent bridges allow systems to isolate memory domains by presenting the
processor subsystem as an endpoint, rather than another memory system. Base
address registers are used to translate addresses; doorbell registers are used to send
interrupts between the address domains; and scratchpad registers are accessible from
both address domains to allow inter-processor communication.
Two Virtual Channels
The ExpressLane PEX 8532 switch supports 2 full-featured Virtual Channels (VCs)
and 8 Traffic Classes (TCs). The mapping of Traffic Classes to port-specific Virtual
Channels allows for different mappings on different ports. In addition, the devices
offer user-selectable Virtual Channel arbitration algorithms to enable users to fine
tune the Quality of Service (QoS) required for a specific application.
Low Power with Granular SerDes Control
The PEX 8532 provides low power capability that is fully compliant with the PCI
Express power management specification. In addition, the SerDes physical links can
be turned off when unused for even lower power.
Version 1.6 2007
PEX 8532
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