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参数资料
| 型号： | PG001M |
| 厂商： | Allegro MicroSystems, Inc. |
| 英文描述： | PARALLEL-TO-SERIAL DATA CONVERTER |
| 中文描述： | 并行到串行数据转换器 |
| 文件页数： | 8/12页 |
| 文件大小： | 179K |
| 代理商： | PG001M |
PG001M
PARALLEL-TO-SERIAL
DATA CONVERTER
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Because the parallel-to-serial conversion requires six
'static' logic signals plus a 'dynamic' (clock) input, the
addition of latches between the
μ
P and five of the control-
ler IC inputs permits use on a bus. Latching the five
signals to CCW/CW, MS
1
, MS
2
, RESET, and VC frees
these five I/O lines for other operations by the
microcontroller. Even at extremely high step rates (>5
kHz), updating the PG001M input data requires an infini-
tesimal percentage of the
μ
P's I/O and control operations.
Figure 4 — Quarter-Step, Full-Step, and High-Torque Full-Step
RESET
CLOCK
IN
CCW/CW
MODE
SELECT
MODE
SELECT
VECTOR
CONTROL
CLOCK
OUT
SERIAL
DATAA
SERIAL
DATAB
STROBE
MONITOR
71.4
40
0
40
71.4
71.4
71.4
100
71.4
91
100
91
71.4
71.4
71.4
100
Dwg. WK-006
1/4-STEP MODE
FULL-STEP MODE
PER CENT
OUTA
B
PER CENT
OUT
1
2
71.4
0
-40
-71.4
71.4
-71.4
-71.4
THIRD QUADRANT
FOURTH QUADRANT
FIRST QUADRANT
SECOND QUADRANT
FIRST QUADRANT
-71.4
71.4
91
100
91
71.4
100
100
40
FULL-STEP MODE
MAXIMUM TORQUE
(141%)
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