参数资料
型号: PGA308AIDGSTG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO10
封装: GREEN, PLASTIC, MSOP-10
文件页数: 23/29页
文件大小: 962K
代理商: PGA308AIDGSTG4
www.ti.com
SBOS440B – JULY 2008 – REVISED DECEMBER 2010
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.
At TA = +25°C, VS = +5V, GND = 0V, DOUT/VCLAMP = +5V, and VREF = +5V, unless otherwise noted.
PGA308
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
VOUT/VIN Differential Signal Gains
(1)
Front-End PGA gains (GF): 4, 6, 8, 12, 16, 32, 64, 100, 200,
2.67
9600
(Front-End PGA + Output Amplifier)
400, 480, 600, 800, 960, 1200, 1600
V/V
Output Amplifier gains: 2, 2.4, 3, 3.6, 4, 4.5, 6
Fine Gain Adjust = 0.33 to 1
VOUT/VIN Slew Rate
CMP_SEL [CFG1 register] = 0
0.6
V/ms
(Front-End PGA + Output Amplifier)
CMP_SEL [CFG1 register] = 1
0.3
V/ms
VOUT/VIN Settling Time (0.01%FSR)
VOUT/VIN differential gain = 8,
13
ms
(Front-End PGA + Output Amplifier)
VOUT = +0.5V to +4.5V step, comp off, no capacitive load
VOUT/VIN differential gain = 200,
15
ms
VOUT = +0.5V to +4.5V step, comp off, no capacitive load
External Sensor Output Sensitivity
(2)
VS = VREF = VCLAMP = +5V
0.08
296
mV/V
FRONT-END PGA
Auto-Zero Internal Frequency
40
kHz
Offset Voltage (RTI)
(3)
Coarse Offset Adjust disabled
±5
±40
mV
vs Temperature
Coarse Offset Adjust disabled
±0.2
mV/°C
vs Supply Voltage, VS
Coarse Offset Adjust disabled
2 + 150/GF
10 + 1000/GF
mV/V
vs Common-Mode Voltage
GF = Front-End PGA gain,
1 + 250/GF
10 + 2000/GF
mV/V
Coarse Offset Adjust disabled
Offset Voltage Programming Range (RTI)
(3)
Coarse Offset Adjust enabled,
–100
100
mV
Coarse Offset Adjust controls offset
vs Temperature
Coarse Offset Adjust enabled
±0.2
mV/°C
vs Supply Voltage, VS
Coarse Offset Adjust enabled
2 + 150/GF
mV/V
vs Common-Mode Voltage
GF = Front-End PGA gain,
1 + 250/GF
mV/V
Coarse Offset Adjust enabled
Linear Input Voltage Range
(4)
0.2
VS – 1.4
V
Input Bias Current
±0.3
±1.5
nA
vs Temperature
10
pA/°C
Input Offset Current
±0.1
±1.5
nA
vs Temperature
10
pA/°C
Input Impedance: Differential
30
∥ 6
G
∥ pF
Input Impedance: Common-Mode
50
∥ 20
G
∥ pF
Input Voltage Noise
RTI, dc to 10Hz, GF = 100, RS = 0
1.2
mVPP
Input Voltage Noise Density
RTI, voltage noise density, f = 1kHz, Coarse Offset Adjust =
50
nV/
√Hz
0V
RTI, voltage noise density, f = 1kHz,
80
nV/
√Hz
Coarse Offset Adjust = 100mV
Input EMI Filter Frequency
f3dB
Input EMI filter to GND, VIN1 and VIN2
40
MHz
PGA Gain
(5)
Gain Range Steps
4, 6, 8, 12, 16, 32, 64, 100, 200, 400, 480, 600, 800, 960,
4
1600
V/V
1200, 1600
Initial Gain Error
GF ≤ 16
±0.03
±0.25
%
32
≤ GF ≤ 480
±0.1
±0.4
%
600
≤ GF ≤ 1600
±0.3
±1
%
vs Temperature
6
ppm/°C
Output Voltage Range
0.05
VS – 0.05
V
Bandwidth
GF = 4
400
kHz
GF = 1600
10
kHz
(1)
PGA308 total differential gain from input (VIN1 – VIN2) to output (VOUT): VOUT / (VIN1 – VIN2) = (PGA gain) × (output amplifier gain) × (fine
gain adjust) with output amplifier internal gains used.
(2)
Based on bridge sensor excitation voltage of +5V and PGA308 output voltage span of 4V. Individual applications must consider noise,
small-signal bandwidth, and required system error to assess if the PGA308 will work for a given sensor sensitivity.
(3)
RTI = Referred-to-input.
(4)
Linear input range is the allowed min/max voltage on the VIN1 and VIN2 pins for the front-end PGA to continue to operate in a linear
region. The allowed common-mode and differential voltage depends on gain and offset settings. Refer to the PGA308 User's Guide
(SBOU069), for more information.
(5)
IREF current load is typically 100mA while in Shutdown mode. Although the output amplifier is disabled in Shutdown mode, RFO and
RGO (180k
typical total) remain connected in series between VFB and GND while in Shutdown mode. See Figure 37, Detailed Block
Diagram, for more information.
Copyright 2008–2010, Texas Instruments Incorporated
3
Product Folder Link(s): PGA308
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