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| 型号： | PI2007-EVAL1 |
| 厂商： | Vicor Corporation |
| 文件页数： | 11/19页 |
| 文件大小： | 0K |
| 描述： | EVAL BRD FOR PI2007 48V/6A |
| 产品培训模块： | Cool-ORing? Series |
| 标准包装： | 1 |
| 系列： | Picor®, Cool-ORing® |
| 主要目的： | 电源管理，O 环控制器/负荷分载 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | PI2007 |
| 已供物品： | 板 |
| 其它名称： | 1102-1057 |
?
R Z ?
V in _ MIN ? V Z _ MAX
I Z ? I B _ MAX
Where:
V in _ MIN : Min input voltage
V Z _ MAX : Zener diode maximum breakdown voltage
I Z :
Zener diode required reverse current
I B _ MAX : Q2 required maximum base current which
calculated from the following equation:
I B _ MAX ?
I C _ MAX
h FE _ MIN
I C _ MAX : Q2 maximum expected collector current.
h FE _ MIN : Q2 minimum gain.
Fault Indication:
FT is an open collector output and its return is
referenced to SGND. When SGND is referenced to
system ground, FT should be pulled up to the logic
voltage via a re sistor (10KΩ) . When the SGND pin is
floating on a bias resistor (R PG ) or in a constant
current circuit, a level shift circuit can be added to
make the FT pin output referenced to the system
ground. See Figure 19. Leave FT unconnected if
not used.
Note that in case of an input fault condition, where
the input voltage (Vin) and the VC pin are at
ground and the SN pin is at a high voltage, a
parasitic path between SN and VC will draw bias
current (leakage current) from the output as a
function of the voltage between SN and grounded
VC (V SN-GND ) based on the following equation:
Figure 15: SN leakage current vs. SN voltage during
input fault condition (input short)
N-Channel MOSFET Selection:
Several factors affect MOSFET selection including
cost, on-state resistance (R DS(on) ), DC current rating,
short pulse current rating, avalanche rating, power
dissipation, thermal conductivity, drain-to-source
breakdown voltage (BVdss), gate-to-source voltage
rating (Vgs), and gate threshold voltage (Vgs (TH) ).
The first step is to select a suitable MOSFET based on
the BVdss requirement for the application. The BVdss
voltage rating should be higher than the applied Vin
voltage plus expected transient voltages. Stray
parasitic inductance in the circuit can also contribute
to significant transient voltage conditions, particularly
during MOSFET turn-off after a reverse current fault
has been detected.
In Active ORing applications when one of the input
power sources is shorted, a large reverse current is
I SN _ Lg ?
Where:
I SN _ Lg :
V SN ? GND ? 12 V
R PAR
SN leakage current during input short
sourced from the circuit output through the MOSFET.
Depending on the output impedance of the system,
the reverse current may get very high in some
conditions before the MOSFET is turned off. Make
sure that the MOSFET pulse current capability can
withstand the peak current. Such high current
conditions will store energy even in a small parasitic
V SN ? GND : Voltage difference between SN pin (or load
voltage) and ground.
element. Note that PI2007 has a very fast response
time to a fault condition achieving 80ns typical and
150ns maximum. This fast response time will
R PAR :
Resistor in the parasitic path, 10KΩ typical
and 8kΩ minimum
minimize the reverse peak current to keep stored
energy and MOSFET avalanche energy very low to
avoid damage (breakdown) to the MOSFET.
Peak current during input short is calculated as
follows, assuming that the output has very low
impedance and it is not a limiting factor:
V S * t RVS
I PEAK ?
L PARASITIC
Picor Corporation ? picorpower.com
PI2007
Rev 1.3
Page 11 of 19
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