参数资料
| 型号： | PI6C2408-1WIE |
| 厂商： | Pericom |
| 文件页数： | 10/10页 |
| 文件大小： | 0K |
| 描述： | IC 4+4 0-DELAY CLK BUFF 16-SOIC |
| 产品变化通告： | Product Discontinuation Notice 22/Jan/2010 |
| 标准包装： | 48 |
| 类型： | 零延迟缓冲器 |
| PLL： | 带旁路 |
| 输入： | TTL |
| 输出： | TTL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:8 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 140MHz |
| 除法器/乘法器： | 无/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 管件 |
2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FMS6690 Rev. 1.0.3
9
FM
S6690
—
Six
C
h
annel,
6
th
Order,
SD/PS/HD
Video
Filt
er
Driver
The same method can be used for biased signals with
the addition of a pull-up resistor to make sure the clamp
never operates. The internal pull-down resistance is
800k
Ω ±20%, so the external resistance should be
7.5M
Ω to set the DC level to 500mV. If a pull-up
resistance of less than 7.5M
Ω desired, add an external
pull-down such that the DC input level is set to 500mV.
75
Ω
LCVF
Bias
Input
75
Ω
0.1
External Video
source must
be AC-coupled.
500mV+/-350mV
7.5M
Ω
Figure 19. Biased SCART with DC-Coupled Outputs
The same circuits can be used with AC-coupled outputs
if desired.
DVD or
STB
SoC
DAC
Output
75
Ω
LCVF
Clamp
Inactive
0V- 1.4V
220
Figure 20. DC-Coupled Inputs, AC-coupled Outputs
75
Ω
LCVF
Clamp
Active
75
Ω
0.1
External video
source must
be AC-coupled.
220
500mV+/-350mV
7.5M
Ω
Figure 21. Biased SCART with AC-Coupled Outputs
Note:
8.
The video tilt or line time distortion is dominated by
the AC-coupling capacitor. The value may need to
be increased beyond 220F to obtain satisfactory
operation in some applications.
Power Dissipation
The FMS6690 output drive configuration must be
considered when calculating overall power dissipation.
Care must be taken not to exceed the maximum die
junction temperature. The following example can be
used to calculate the FMS6690’s power dissipation and
internal temperature rise.
TJ= TA+ Pd ΘJA
(1)
where Pd= PCH1+ PCH2+ PCHx,
and PCHx= VS ICH- (VO
2/RL)
(2)
where:
VO = 2VIN+ 0.280V;
ICH = (ICC/ 6) + (VO/RL);
VIN= RMS value of input signal;
ICC = 60mA;
VS= 5V; and
RL= channel load resistance.
Board layout affects thermal characteristics. Refer to
the Layout Considerations section for more information
.
Output Considerations
The FMS6690 outputs are DC offset from the input by
150mV therefore, VOUT = 2VIN DC+150mv. This offset
is required to obtain optimal performance from the
output driver and is held at the minimum value to
decrease the standing DC current into the load. Since
the FMS6690 has a 2x (6dB) gain, the output is typically
connected via a 75-series back-matching resistor
followed by the 75 video cable. Because of the
inherent divide by two of this configuration, the blanking
level at the load of the video signal is always less then
1V. When AC-coupling the output, ensure that the
coupling capacitor of choice passes the lowest
frequency content in the video signal and that line time
distortion (video tilt) is kept as low as possible.
The selection of the coupling capacitor is a function of
the subsequent circuit input impedance and the leakage
current of the input being driven. To obtain the highest-
quality output video signal, the series termination
resistor must be placed as close to the device output
pin as possible. This greatly reduces the parasitic
capacitance and inductance effect on the FMS6690
output driver. The distance from device pin to place
series termination resistor should be no greater than 0.1
inches.
Figure 22. Distance from Device Pin to Series
Termination Resistor
相关PDF资料 |
PDF描述 |
|---|---|
| VI-24R-MW-F4 | CONVERTER MOD DC/DC 7.5V 100W |
| MS17343R36N5P | CONN RCPT 4POS WALL MT W/PINS |
| MS17346R28C10S | CONN RCPT 7POS BOX MT W/SCKT |
| PI6C2408-1WE | IC 4+4 0-DELAY CLK BUFF 16-SOIC |
| VI-24R-MW-F3 | CONVERTER MOD DC/DC 7.5V 100W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PI6C2408-1WIEX | 功能描述:锁相环 - PLL 4+4 Zero Delay Clock Buffer RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| PI6C2408-2 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Clock IC | 4+4 Output Zero-Delay Clock Driver(Bank A = Ref. Bank B=Ref/2). 10 to 134 MHz |
| PI6C2408-2I | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Clock IC | 4+4 Output Zero-Delay Clock Driver (Bank A = Ref. Bank B=Ref/2). 10 to 134 MHz. Industrial Temp. Operation |
| PI6C2408-2W | 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:Zero-Delay Clock Buffer |
| PI6C2408-2WE | 功能描述:锁相环 - PLL 4+4 Zero Delay Clock Buffer RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。