参数资料
| 型号： | PI74ALVCH16260A |
| 厂商： | Pericom |
| 文件页数： | 1/6页 |
| 文件大小： | 0K |
| 描述： | IC 12/14-BIT MUX/LATCH 56-TSSOP |
| 产品变化通告： | Product Discontinuation 17/Feb/2006 |
| 标准包装： | 35 |
| 系列： | 74ALVCH |
| 逻辑类型： | D 型，可寻址 |
| 电路： | 12:24 |
| 输出类型： | 三态 |
| 电源电压： | 2.3 V ~ 3.6 V |
| 独立电路： | 1 |
| 延迟时间 - 传输： | 1ns |
| 输出电流高，低： | 24mA，24mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 56-TFSOP（0.240"，6.10mm 宽） |
| 供应商设备封装： | 56-TSSOP |
| 包装： | 管件 |
1
PS8089D
05/24/06
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12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
Logic Block Diagram
G1
OE2B
C1
1D
1B1
TO 11 OTHER CHANNELS
OE1B
OEA
A1
LE1B
LE2B
LEA1B
LEA2B
SEL
1
C1
1D
C1
1D
C1
1D
2B1
23
6
28
8
1
29
56
55
30
27
2
Product Features
PI74ALVCH16260 is designed for low voltage operation
VCC = 2.3V to 3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Bus Hold retains last active bus state during 3-State,
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
PI74ALVCH16260
Product Description
ThePI74ALVCH16260isa12-bitto24-bitmultiplexedD-typelatch
designed for 2.3V to 3.6 VCC operation. It is used in applications
where two separate datapaths must be multiplexed onto, or
demultiplexed from, a single data path.
Typical applications include multiplexing and/or demultiplexing
address and data information in microprocessor or bus-interface
and in memory-interleaving.
Three12-bitI/Oports(A1-A12,1B1-1B12,and2B1-2B12)areavailable
for address and/or data transfer. The output-enable (OE1B, OE2B,
and OEA) inputs control bus transceiver functions. The OE1B and
OE2BcontrolsignalsalsoallowbankcontrolintheA-to-Bdirection.
Address and/or data information can be stored using the internal
storagelatches.Thelatch-enable(LE1B,LE2B,LEA1B,andLEA2B)
inputs are used to control data storage. When the latch-enable input
is HIGH, the latch is transparent. When the latch-enable input goes
LOW, the data present at the inputs is latched and remains latched
until the latch-enable input is returned HIGH.
To ensure high-impedance state during power up or power down,
OE should be tied to VCC through a pullup resistor whose minimum
value is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
06-0132
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PI74ALVCH16260A56 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Bus Exchanger |
| PI74ALVCH16260V | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Bus Exchanger |
| PI74ALVCH16260V56 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Bus Exchanger |
| PI74ALVCH16269 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Logic | 12/24-Bit Registered Bus Transceiver |
| PI74ALVCH16269A | 制造商:Pericom Semiconductor Corporation 功能描述:Registered Bus Exchanger 1-Element 56-Pin TSSOP Tube 制造商:Pericom Semiconductor Corporation 功能描述:ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, 56 Pin Plastic SMT |
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