参数资料
型号: PIC12F510-E/SN
厂商: Microchip Technology
文件页数: 28/39页
文件大小: 0K
描述: IC PIC MCU FLASH 1.5KB 8SOIC
产品培训模块: Asynchronous Stimulus
标准包装: 100
系列: PIC® 12F
核心处理器: PIC
芯体尺寸: 8-位
速度: 8MHz
外围设备: POR,WDT
输入/输出数: 5
程序存储器容量: 1.5KB(1K x 12)
程序存储器类型: 闪存
RAM 容量: 38 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 4x8b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 管件
配用: AC162070-ND - HEADER INTRFC MPLAB ICD2 8/14P
34
6462AS–ATARM–03-Jun-09
AT91SAM9G10
RS485 with driver control signal
ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
– NACK handling, error counter with repetition and iteration limit
IrDA modulation and demodulation
– Communication at up to 115.2 Kbps
Test Modes
– Remote Loopback, Local Loopback, Automatic Echo
10.10 Synchronous Serial Controller
Provides serial synchronous communication links used in audio and telecom applications
(with CODECs in Master or Slave Modes, I
2S, TDM Buses, Magnetic Card Reader and
more).
Contains an independent receiver and transmitter and a common clock divider.
Offers a configurable frame sync and data length.
Receiver and transmitter can be programmed to start automatically or on detection of
different event on the frame sync signal.
Receiver and transmitter include a data signal, a clock signal and a frame synchronization
signal.
10.11 Timer Counter
Three 16-bit Timer Counter Channels
Wide range of functions including:
– Frequency Measurement
– Event Counting
– Interval Measurement
– Pulse Generation
–Delay Timing
– Pulse Width Modulation
– Up/down Capabilities
Each channel is user-configurable and contains:
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
Two global registers that act on all three TC Channels
10.12 MultiMediaCard Interface
Two double-channel MultiMediaCard Interfaces, allowing concurrent transfers with 2 cards
Compatibility with MultiMediaCard Specification Version 3.31
Compatibility with SD Memory Card Specification Version 1.0
Compatibility with SDIO Specification Version V1.1
Cards clock rate up to Master Clock divided by 2
Embedded power management to slow down clock rate when not used
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