参数资料
型号: PIC14000T-20/SS
厂商: Microchip Technology
文件页数: 68/153页
文件大小: 0K
描述: IC MCU OTP 4KX14 A/D 28SSOP
标准包装: 2,100
系列: PIC® 14
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C
外围设备: POR,温度传感器,WDT
输入/输出数: 20
程序存储器容量: 7KB(4K x 14)
程序存储器类型: OTP
RAM 容量: 192 x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 6 V
数据转换器: 斜率 A/D
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 带卷 (TR)
1996 Microchip Technology Inc.
Preliminary
DS40122B-page 21
PIC14000
4.2.2.5
PIR1 REGISTER
This register contains the individual ag bits for the
Peripheral interrupts (Figure 4-7).
Note:
These bits will be set by the specied
condition,
even
if
the
corresponding
Interrupt Enable bit is cleared (interrupt
disabled) or the GIE bit is cleared (all
interrupts disabled). Before enabling an
interrupt, the user may wish to clear the
corresponding interrupt ag, to ensure that
the program does not immediately branch
to the Peripheral Interrupt service routine.
FIGURE 4-7:
PIR1 REGISTER
CMIF
R/W
R
R/W
bit0
bit7
CMIF:
Programmable Reference Comparator Interrupt Flag
1 = The comparator output has tripped. This is a
0 = The interrupt did not occur
Unimplemented. Read as ‘0’
W: Writable
R:
Readable
U:
Unimplemented,
read as ‘0’
Register:
PIR1
Address:
0Ch
POR value: 00h
PBIF
I2CIF
RCIF
ADCIF
OVFIF
Unimplemented. Read as ‘0’
OVFIF: A/D counter Overflow Interrupt Flag
1 = An A/D counter overflow has occurred.
Must be cleared in software.
0 = An A/D counter overflow has not occurred
ADCIF: A/D Capture Interrupt Flag
1 = An A/D capture has occurred.
Must be cleared in software.
0 = An A/D capture has not occurred
RCIF:
PORTC Interrupt on Change Flag
1 = At least one RC<7:4> input changed.
Must be cleared in software.
0 =None of the RC<7:4> inputs have changed
I2CIF:
I2C
Port Interrupt Flag
1 = A transmission/reception is completed.
Must be cleared in software.
0 =Waiting to transmit/receive
PBIF:
External Pushbutton Interrupt Flag
1 = The external pushbutton interrupt has occurred
0 =The external pushbutton interrupt did not occur
on OSC1/PBTN. Note: This interrupt is not available
in HS mode.
level-sensitive interrupt.
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