参数资料
型号: PIC16C433-I/SO
厂商: Microchip Technology
文件页数: 27/126页
文件大小: 0K
描述: IC MCU CMOS 8BIT 10MHZ 2K 18SOIC
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 42
系列: PIC® 16C
核心处理器: PIC
芯体尺寸: 8-位
速度: 10MHz
连通性: LIN(本地互连网络)
外围设备: POR,WDT
输入/输出数: 5
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: OTP
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
数据转换器: A/D 4x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 18-SOIC(0.295",7.50mm 宽)
包装: 管件
产品目录页面: 636 (CN2011-ZH PDF)
配用: XLT18SO-1-ND - SOCKET TRANSITION 18SOIC 300MIL
122
4378C–AVR–09/08
AT90PWM1
15.10.9
Timer/Counter1 Interrupt Flag Register – TIFR1
Bit 7, 6 – Res: Reserved Bits
These bits are unused bits in the AT90PWM1, and will always read as zero.
Bit 5 – ICF1: Timer/Counter1, Input Capture Flag
This flag is set when a capture event occurs on the ICP1 pin. When the Input Capture Register
(ICR1) is set by the WGMn3:0 to be used as the TOP value, the ICF1 Flag is set when the
counter reaches the TOP value.
ICF1 is automatically cleared when the Input Capture Interrupt Vector is executed. Alternatively,
ICF1 can be cleared by writing a logic one to its bit location.
Bit 4, 3 – Res: Reserved Bits
These bits are unused bits in the AT90PWM1, and will always read as zero.
Bit 2 – OCF1B: Timer/Counter1, Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output
Compare Register B (OCR1B).
Note that a Forced Output Compare (FOC1B) strobe will not set the OCF1B Flag.
OCF1B is automatically cleared when the Output Compare Match B Interrupt Vector is exe-
cuted. Alternatively, OCF1B can be cleared by writing a logic one to its bit location.
Bit 1 – OCF1A: Timer/Counter1, Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output
Compare Register A (OCR1A).
Note that a Forced Output Compare (FOC1A) strobe will not set the OCF1A Flag.
OCF1A is automatically cleared when the Output Compare Match A Interrupt Vector is exe-
cuted. Alternatively, OCF1A can be cleared by writing a logic one to its bit location.
Bit 0 – TOV1: Timer/Counter1, Overflow Flag
The setting of this flag is dependent of the WGMn3:0 bits setting. In Normal and CTC modes,
the TOV1 Flag is set when the timer overflows. Refer to Table 32 on page 118 for the TOV1 Flag
behavior when using another WGMn3:0 bit setting.
TOV1 is automatically cleared when the Timer/Counter1 Overflow Interrupt Vector is executed.
Alternatively, TOV1 can be cleared by writing a logic one to its bit location.
Bit
7
65
43
21
0
ICF1
OCF1B
OCF1A
TOV1
TIFR1
Read/Write
R
R/W
R
R/W
Initial Value0
00
0
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