参数资料
型号: PIC16C433-I/SO
厂商: Microchip Technology
文件页数: 56/126页
文件大小: 0K
描述: IC MCU CMOS 8BIT 10MHZ 2K 18SOIC
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 42
系列: PIC® 16C
核心处理器: PIC
芯体尺寸: 8-位
速度: 10MHz
连通性: LIN(本地互连网络)
外围设备: POR,WDT
输入/输出数: 5
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: OTP
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
数据转换器: A/D 4x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 18-SOIC(0.295",7.50mm 宽)
包装: 管件
产品目录页面: 636 (CN2011-ZH PDF)
配用: XLT18SO-1-ND - SOCKET TRANSITION 18SOIC 300MIL
2002 Microchip Technology Inc.
Preliminary
DS41139B-page 33
PIC16C433
6.0
LIN Bus TRANSCEIVER
The PIC16C433 has an integrated LIN bus transceiver,
which allows the microcontroller to communicate via a
LIN bus. The LIN bus protocol is handled by the micro-
controller. The conversion from 5V signal to LIN bus
signals is handled by the transceiver
6.1
The LIN Bus Protocol
The LIN bus protocol is not described within this docu-
ment. For further information regarding the LIN bus
protocol, please refer to www.lin-subbus.org.
6.2
LIN Bus Interfacing
The LIN protocol is implemented and programmed by
the user, using the LINTX and LINRX bits, which are
used to interface to the transceiver. The LIN Bus firm-
ware transmits by toggling the LINTX bit in the GPIO
register and is read by reading the LINRX bit in the
GPIO register. All aspects of the protocol are handled
by software (i.e. bit-banged), where the transceiver is
used as the physical interface to the LIN Bus network.
For LIN Bus slave implementation software, please
refer to Microchip's web site (www.microchip.com).
The transceiver in the PIC16C433 uses the microcon-
troller's dual-die interface; therefore, the software must
initialize the LINTX and LINRX bits to a '1' before each
LIN communication. If the LINTX bit is left cleared (e.g.,
CLRF GPIO), no other nodes on the network will be
able to communicate on the LIN Bus until LINTX is set
to '1' for '0' is the dominate state for the protocol.
EXAMPLE 6-1:
Initializing LINTX and
LINRX Bits
It is recommended that the firmware verify each bit
transmitted, by comparing the LINTX and LINRX bits,
to ensure no bus contention or hardware failure has
occurred. The LINTX and LINRX bits have no associ-
ated TRIS bits. Therefore, LINTX is always an output
and LINRX is always an input.
6.3
LIN Bus Hardware Interface
Figure 6-3 shows how to implement the hardware LIN
Bus interface in a master configuration and Figure 6-4
in a slave configuration using the PIC16C433.
Figure 6-5 shows how to implement the hardware for a
master configuration using BACT pin to generate a
wake-up interrupt using GP2. The transceiver has an
internal series resistor and diode, as defined in the LIN
1.2 specification, connecting VBAT and LIN pin.
FIGURE 6-1:
BLOCK DIAGRAM OF LINRX (SDA LINE)
MOVLW
H'C0'
MOVWF
GPIO
EN
D
EN
QD
ck
RESET
ck
Q
Data bus
Write
Output Latch
Schmitt Trigger
ltchpin
Input Latch
Read
V
DD
GPIO
to LIN Transceiver
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