参数资料
型号: PIC16C433T-I/SO
厂商: Microchip Technology
文件页数: 124/126页
文件大小: 0K
描述: IC MCU CMOS 8BIT 10MHZ 2K 18SOIC
标准包装: 1,100
系列: PIC® 16C
核心处理器: PIC
芯体尺寸: 8-位
速度: 10MHz
连通性: LIN(本地互连网络)
外围设备: POR,WDT
输入/输出数: 5
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: OTP
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
数据转换器: A/D 4x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 18-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
97
4378C–AVR–09/08
AT90PWM1
Figure 15-1. 16-bit Timer/Counter Block Diagram(1)
Note:
1. Refer to
Table on page 4 for Timer/Counter1 pin placement and description.
15.1.1
Registers
The Timer/Counter (TCNTn), Output Compare Registers (OCRnx), and Input Capture Register
(ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-bit
registers. These procedures are described in the section “Accessing 16-bit Registers” on page
98. The Timer/Counter Control Registers (TCCRnx) are 8-bit registers and have no CPU access
restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFRn). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSKn). TIFRn and TIMSKn are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the Tn pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
Tn).
The double buffered Output Compare Registers (OCRnx) are compared with the Timer/Counter
value at all time. The result of the compare can be used by the Waveform Generator to generate
a PWM or variable frequency output on the Output Compare pin (OCnx). See “Output Compare
Units” on page 104. The compare match event will also set the Compare Match Flag (OCFnx)
which can be used to generate an Output Compare interrupt request.
Clock Select
Timer/Counter
D
ATA
B
U
S
OCRnA
OCRnB
ICRn
=
TCNTn
Waveform
Generation
Waveform
Generation
OCnA
OCnB
Noise
Canceler
ICPnB
=
Fixed
TOP
Values
Edge
Detector
Control Logic
= 0
TOP
BOTTOM
Count
Clear
Direction
TOVn
(Int.Req.)
OCnA
(Int.Req.)
OCnB
(Int.Req.)
ICFn (Int.Req.)
TCCRnA
TCCRnB
Tn
Edge
Detector
( From Prescaler )
clk
Tn
ICPnA
ICPSEL1
0
1
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