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参数资料
型号： PIC16C765-I/P
厂商： Microchip Technology
文件页数： 146/165页
文件大小： 0K
描述： IC MCU OTP 8KX14 USB 40DIP
产品培训模块： Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装： 10
系列： PIC® 16C
核心处理器： PIC
芯体尺寸： 8-位
速度： 24MHz
连通性： SCI，UART/USART，USB
外围设备： 欠压检测/复位，POR，PWM，WDT
输入/输出数： 33
程序存储器容量： 14KB（8K x 14）
程序存储器类型： OTP
RAM 容量： 256 x 8
电压 - 电源 (Vcc/Vdd)： 4.35 V ~ 5.25 V
数据转换器： A/D 8x8b
振荡器型： 外部
工作温度： -40°C ~ 85°C
封装/外壳： 40-DIP（0.600"，15.24mm）
包装： 管件
产品目录页面： 636 (CN2011-ZH PDF)
配用： ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
444-1001-ND - DEMO BOARD FOR PICMICRO MCU
其它名称： Q975613
2000 Microchip Technology Inc.
Preliminary
DS41124C-page 81
PIC16C745/765
11.2
USART Asynchronous Mode
In this mode, the USART uses standard nonreturn-to-
zero (NRZ) format (one start bit, eight or nine data bits,
and one stop bit). The most common data format is 8
bits. An on-chip, dedicated, 8-bit baud rate generator
can be used to derive standard baud rate frequencies
from the oscillator. The USART transmits and receives
the LSb first. The USART’s transmitter and receiver are
functionally independent, but use the same data format
and baud rate. The baud rate generator produces a
clock either x16 or x64 of the bit shift rate, depending
on bit BRGH (TXSTA<2>). Parity is not supported by
the hardware, but can be implemented in software (and
stored as the ninth data bit). Asynchronous mode is
stopped during SLEEP.
Asynchronous mode is selected by clearing bit SYNC
(TXSTA<4>).
The USART Asynchronous module consists of the fol-
lowing important elements:
Baud Rate Generator
Sampling Circuit
Asynchronous Transmitter
Asynchronous Receiver
11.2.1
USART ASYNCHRONOUS TRANSMITTER
The USART transmitter block diagram is shown in
Figure 11-1. The heart of the transmitter is the transmit
(serial) shift register (TSR). The shift register obtains its
data from the read/write transmit buffer, TXREG. The
TXREG register is loaded with data in software. The
TSR register is not loaded until the STOP bit has been
transmitted from the previous load. As soon as the
STOP bit is transmitted, the TSR is loaded with new
data from the TXREG register (if available). Once the
TXREG register transfers the data to the TSR register
(occurs in one TCY), the TXREG register is empty and
flag bit TXIF (PIR1<4>) is set. This interrupt can be
enabled/disabled by setting/clearing enable bit TXIE
( PIE1<4>). Flag bit TXIF will be set regardless of the
state of enable bit TXIE and cannot be cleared in soft-
ware. It will reset only when new data is loaded into the
TXREG register. While flag bit TXIF indicated the sta-
tus of the TXREG register, another bit TRMT
(TXSTA<1>) shows the status of the TSR register. Sta-
tus bit TRMT is a read only bit, which is set when the
TSR register is empty. No interrupt logic is tied to this
bit, so the user has to poll this bit in order to determine
if the TSR register is empty.
Transmission is enabled by setting enable bit TXEN
(TXSTA<5>). The actual transmission will not occur
until the TXREG register has been loaded with data
and the baud rate generator (BRG) has produced a
shift clock (Figure 11-2). The transmission can also be
started by first loading the TXREG register and then
setting enable bit TXEN. Normally, when transmission
is first started, the TSR register is empty. At that point,
transfer to the TXREG register will result in an immedi-
ate transfer to TSR, resulting in an empty TXREG. A
back-to-back transfer is thus possible (Figure 11-3).
Clearing enable bit TXEN during a transmission will
cause the transmission to be aborted and will reset the
transmitter. As a result, the RC6/TX/CK pin will revert
to hi-impedance.
In order to select 9-bit transmission, transmit bit TX9
(TXSTA<6>) should be set and the ninth bit should be
written to TX9D (TXSTA<0>). The ninth bit must be
written before writing the 8-bit data to the TXREG reg-
ister. This is because a data write to the TXREG regis-
ter can result in an immediate transfer of the data to the
TSR register (if the TSR is empty). In such a case, an
incorrect ninth data bit may be loaded in the TSR
register.
FIGURE 11-1:
USART TRANSMIT BLOCK DIAGRAM
Note 1: The TSR register is not mapped in data
memory, so it is not available to the user.
2: Flag bit TXIF is set when enable bit TXEN
is set. TXIF is cleared by loading TXREG.
TXIF
TXIE
Interrupt
TXEN
Baud Rate CLK
SPBRG
Baud Rate Generator
TX9D
MSb
LSb
Data Bus
TXREG Register
TSR Register
(8)
0
TX9
TRMT
SPEN
RC6/TX/CK pin
Pin Buffer
and Control
8
745cov.book Page 81 Wednesday, August 2, 2000 8:24 AM
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PIC16C765T-I/L 功能描述:8位微控制器 -MCU 14KB 256 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC16C765T-I/PT 功能描述:8位微控制器 -MCU 14KB 256 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC16C76T-04/SO 功能描述:8位微控制器 -MCU 14KB 368 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC16C76T-04E/SO 功能描述:8位微控制器 -MCU 14KB 368 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC16C76T-04I/SO 功能描述:8位微控制器 -MCU 14KB 368 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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