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型号： PIC16C923T-08I/PT
厂商： Microchip Technology
文件页数： 97/115页
文件大小： 0K
描述： IC MCU OTP 4KX14 LCD DVR 64TQFP
标准包装： 1,200
系列： PIC® 16C
核心处理器： PIC
芯体尺寸： 8-位
速度： 8MHz
连通性： I²C，SPI
外围设备： LCD，POR，PWM，WDT
输入/输出数： 25
程序存储器容量： 7KB（4K x 14）
程序存储器类型： OTP
RAM 容量： 176 x 8
电压 - 电源 (Vcc/Vdd)： 4 V ~ 6 V
振荡器型： 外部
工作温度： -40°C ~ 85°C
封装/外壳： 64-TQFP
包装： 带卷 (TR)
配用： DVA16PQ640-ND - ADAPTER DEVICE FOR MPLAB-ICE
AC164023-ND - MODULE SKT PROMATEII 68TQFP
PIC16C9XX
DS30444E - page 82
1997 Microchip Technology Inc.
12.1
A/D Acquisition Requirements
For the A/D converter to meet its specied accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 12-4. The source
impedance (RS) and the internal sampling switch (RSS)
impedance directly affect the time required to charge
the capacitor CHOLD. The sampling switch (RSS) imped-
ance
varies
over
the
device
voltage
(VDD),
(Figure 12-4). The source impedance affects the offset
voltage at the analog input (due to pin leakage current).
The maximum recommended impedance for ana-
log sources is 10 k
. After the analog input channel is
selected (changed) this acquisition must be done
before the conversion can be started.
To
calculate
the
minimum
acquisition
time,
Equation 12-1 may be used. This equation calculates
the acquisition time to within 1/2 LSb error (512 steps
for the A/D). The 1/2 LSb error is the maximum error
allowed for the A/D to meet its specied accuracy.
EQUATION 12-1:
A/D MINIMUM CHARGING
TIME
VHOLD = (VREF - (VREF/512)) (1 - e(-Tc/C
HOLD
(RIC + RSS + RS)))
Given: VHOLD = (VREF/512), for 1/2 LSb resolution
The above equation reduces to:
TC = -(51.2 pF)(1 k
- RSS + RS) ln(1/511)
Example 12-1 shows the calculation of the minimum
required acquisition time (TACQ). This calculation is
based on the following system assumptions.
CHOLD
= 51.2 pF
Rs = 10 k
1/2 LSb error
VDD = 5V
→ Rss = 7 k
Temp (system max.) = 50
°C
VHOLD = 0 @ t = 0
EXAMPLE 12-1: CALCULATING THE
MINIMUM REQUIRED
SAMPLE TIME
TACQ = Amplier Settling Time +
Holding Capacitor Charging Time +
Temperature Coefcient
TACQ = 5
s + Tc + [(Temp - 25°C)(0.05 s/°C)]
TC =
-CHOLD (RIC + RSS + RS) ln(1/511)
-51.2 pF (1 k
+ 7 k + 10 k) ln(0.0020)
-51.2 pF (18 k
) ln(0.0020)
-0.921
s (-6.2364)
5.747
s
TACQ = 5
s + 5.747 s + [(50°C - 25°C)(0.05 s/°C)]
10.747
s + 1.25 s
11.997
s
Note 1: The reference voltage (VREF) has no
effect on the equation, since it cancels
itself out.
Note 2: The charge holding capacitor (CHOLD) is
not discharged after each conversion.
Note 3: The maximum recommended impedance
for analog sources is 10 k
. This is
required to meet the pin leakage speci-
cation.
Note 4: After a conversion has completed, a
2.0 TAD delay must complete before
acquisition can begin again. During this
time the holding capacitor is not con-
nected to the selected A/D input channel.
FIGURE 12-4: ANALOG INPUT MODEL
CPIN
VA
Rs
RAx
5 pF
VDD
VT = 0.6V
I leakage
RIC
≤ 1k
Sampling
Switch
SS
RSS
CHOLD
= DAC capacitance
VSS
6V
Sampling Switch
5V
4V
3V
2V
5 6 7 8 9 10 11
( k
)
VDD
= 51.2 pF
± 500 nA
Legend CPIN
VT
I leakage
RIC
SS
CHOLD
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
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PIC16C924-04/L 功能描述:8位微控制器 -MCU 7KB 176 RAM 52 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC16C924-04/PT 功能描述:8位微控制器 -MCU 7KB 176 RAM 52 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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PIC16C924-04I/PT 功能描述:8位微控制器 -MCU 7KB 176 RAM 52 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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