参数资料
型号: PIC16F526T-I/MG
厂商: Microchip Technology
文件页数: 9/122页
文件大小: 0K
描述: MCU PIC 1.5K FLASH 3X3 16QFN
标准包装: 3,300
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
外围设备: POR,WDT
输入/输出数: 11
程序存储器容量: 1.5KB(1K x 12)
程序存储器类型: 闪存
RAM 容量: 67 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 3x8b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 16-VFQFN 裸露焊盘
包装: 带卷 (TR)
PIC18F2221/2321/4221/4321 FAMILY
DS39689F-page 106
2009 Microchip Technology Inc.
10.4
IPR Registers
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of periph-
eral interrupt sources, there are two Peripheral Interrupt
Priority registers (IPR1 and IPR2). Using the priority bits
requires that the Interrupt Priority Enable (IPEN) bit be
set.
REGISTER 10-8:
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
R/W-1
PSPIP(1)
ADIP
RCIP
TXIP
SSPIP
CCP1IP
TMR2IP
TMR1IP
bit 7
bit 0
bit 7
PSPIP: Parallel Slave Port Read/Write Interrupt Priority bit(1)
1 =High priority
0 = Low priority
Note 1: This bit is unimplemented on 28-pin devices and will read as ‘0’.
bit 6
ADIP: A/D Converter Interrupt Priority bit
1 =High priority
0 = Low priority
bit 5
RCIP: EUSART Receive Interrupt Priority bit
1 =High priority
0 = Low priority
bit 4
TXIP: EUSART Transmit Interrupt Priority bit
1 =High priority
0 = Low priority
bit 3
SSPIP: Master Synchronous Serial Port Interrupt Priority bit
1 =High priority
0 = Low priority
bit 2
CCP1IP: CCP1 Interrupt Priority bit
1 =High priority
0 = Low priority
bit 1
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1 =High priority
0 = Low priority
bit 0
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 =High priority
0 = Low priority
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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