参数资料
型号: PIC16F54-I/SS
厂商: Microchip Technology
文件页数: 6/88页
文件大小: 0K
描述: IC MCU FLASH 512X12 20SSOP
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 67
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
外围设备: POR,WDT
输入/输出数: 12
程序存储器容量: 768B(512 x 12)
程序存储器类型: 闪存
RAM 容量: 25 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
包装: 管件
产品目录页面: 638 (CN2011-ZH PDF)
配用: AC164307-ND - MODULE SKT FOR PM3 28SSOP
AC164014-ND - MODULE SKT PROMATEII 44PQFP
PIC16F5X
DS41213D-page 12
2007 Microchip Technology Inc.
2.1
Clocking Scheme/Instruction
Cycle
The clock input (OSC1/CLKIN pin) is internally divided
by four to generate four non-overlapping quadrature
clocks, namely Q1, Q2, Q3 and Q4. Internally, the
Program Counter (PC) is incremented every Q1 and
the instruction is fetched from program memory and
latched into the instruction register in Q4. It is decoded
and executed during the following Q1 through Q4. The
clocks and instruction execution flow are shown in
2.2
Instruction Flow/Pipelining
An instruction cycle consists of four Q cycles (Q1, Q2,
Q3 and Q4). The instruction fetch and execute are
pipelined such that fetch takes one instruction cycle,
while decode and execute takes another instruction
cycle. However, due to the pipelining, each instruction
effectively executes in one cycle. If an instruction
causes the Program Counter to change (e.g., GOTO),
then two cycles are required to complete the instruction
A fetch cycle begins with the Program Counter (PC)
incrementing in Q1.
In the execution cycle, the fetched instruction is latched
into the instruction register in cycle Q1. This instruction
is then decoded and executed during the Q2, Q3 and
Q4 cycles. Data memory is read during Q2 (operand
read) and written during Q4 (destination write).
FIGURE 2-2:
CLOCK/INSTRUCTION CYCLE
EXAMPLE 2-1:
INSTRUCTION PIPELINE FLOW
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
OSC1
Q1
Q2
Q3
Q4
PC
OSC2/CLKOUT
(RC mode)
PC
PC + 1
PC + 2
Fetch INST (PC)
Execute INST (PC - 1)
Fetch INST (PC + 1)
Execute INST (PC)
Fetch INST (PC + 2)
Execute INST (PC + 1)
Internal
phase
clock
All instructions are single cycle, except for any program branches. These take two cycles since the fetch instruction
is “flushed” from the pipeline, while the new instruction is being fetched and then executed.
1. MOVLW H'55'
Fetch 1
Execute 1
2. MOVWF PORTB
Fetch 2
Execute 2
3. CALL
SUB_1
Fetch 3
Execute 3
4. BSF
PORTA, BIT3
Fetch 4
Flush
Fetch SUB_1 Execute SUB_1
相关PDF资料
PDF描述
PIC16F54-I/SO IC MCU FLASH 512X12 18SOIC
006207341915000+ CONN FPC R ANGLE 1.25 MM 15POS
PIC10F202-I/P IC PIC MCU FLASH 512X12 8DIP
006208516210000+ CONN FFC/FPC 16POS 1MM ZIF SMD
006200514230000 CONN FFC/FPC 14POS 1MM R/A SMD
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