参数资料
型号: PIC16F72T-E/SS
厂商: Microchip Technology
文件页数: 3/136页
文件大小: 0K
描述: IC PIC MCU FLASH 2KX14 28-SSOP
产品培训模块: Asynchronous Stimulus
标准包装: 2,100
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C,SPI
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 22
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 4 V ~ 5.5 V
数据转换器: A/D 5x8b
振荡器型: 外部
工作温度: -40°C ~ 125°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 带卷 (TR)
100
2535J–AVR–08/10
ATtiny13
To read the Fuse High Byte (FHB), simply replace the address in the Z-pointer with 0x0003 and
repeat the procedure above.
If successful, the contents of the destination register are as follows.
for more information on fuse and lock bits.
16.7 Preventing Flash Corruption
During periods of low VCC, the Flash program can be corrupted because the supply voltage is
too low for the CPU and the Flash to operate properly. These issues are the same as for board
level systems using the Flash, and the same design solutions should be applied.
A Flash program corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly. Secondly,
the CPU itself can execute instructions incorrectly, if the supply voltage for executing instructions
is too low.
Flash corruption can easily be avoided by following these design recommendations (one is
sufficient):
1. Keep the AVR RESET active (low) during periods of insufficient power supply voltage.
This can be done by enabling the internal Brown-out Detector (BOD) if the operating
voltage matches the detection level. If not, an external low VCC reset protection circuit
can be used. If a reset occurs while a write operation is in progress, the write operation
will be completed provided that the power supply voltage is sufficient.
2. Keep the AVR core in Power-down sleep mode during periods of low VCC. This will pre-
vent the CPU from attempting to decode and execute instructions, effectively protecting
the SPMCSR Register and thus the Flash from unintentional writes.
16.8 Programming Time for Flash when Using SPM
The calibrated RC Oscillator is used to time Flash accesses. Table 16-1 on page 100 shows the
typical programming time for Flash accesses from the CPU.
Note:
1. The min and max programming times is per individual operation.
Bit
7
6
543
2
1
0
Rd
FHB7
FHB6
FHB5
FHB4
FHB3
FHB2
FHB1
FHB0
Table 16-1.
SPM Programming Time(1)
Symbol
Min Programming Time
Max Programming Time
Flash write (Page Erase, Page Write, and
write lock bits by SPM)
3.7 ms
4.5 ms
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