参数资料
型号: PIC16F72T-E/SS
厂商: Microchip Technology
文件页数: 68/136页
文件大小: 0K
描述: IC PIC MCU FLASH 2KX14 28-SSOP
产品培训模块: Asynchronous Stimulus
标准包装: 2,100
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C,SPI
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 22
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 4 V ~ 5.5 V
数据转换器: A/D 5x8b
振荡器型: 外部
工作温度: -40°C ~ 125°C
封装/外壳: 28-SSOP(0.209",5.30mm 宽)
包装: 带卷 (TR)
2007 Microchip Technology Inc.
DS39597C-page 35
PIC16F72
7.0
READING PROGRAM MEMORY
The FLASH Program Memory is readable during nor-
mal operation over the entire VDD range. It is indirectly
addressed through Special Function Registers (SFR).
Up to 14-bit wide numbers can be stored in memory for
use as calibration parameters, serial numbers, packed
7-bit ASCII, etc. Executing a program memory location
containing data that forms an invalid instruction results
in a NOP.
There are five SFRs used to read the program and
memory:
PMCON1
PMDATL
PMDATH
PMADRL
PMADRH
The program memory allows word reads. Program
memory access allows for checksum calculation and
reading calibration tables.
When interfacing to the program memory block, the
PMDATH:PMDATL registers form a two-byte word,
which
holds
the
14-bit
data
for
reads.
The
PMADRH:PMADRL registers form a two-byte word,
which holds the 13-bit address of the FLASH location
being accessed. This device has up to 2K words of
program FLASH, with an address range from 0h to
07FFh. The unused upper bits PMDATH<7:6> and
PMADRH<7:5> are not implemented and read as
zeros.
7.1
PMADR
The address registers can address up to a maximum of
8K words of program FLASH.
When selecting a program address value, the MSByte
of the address is written to the PMADRH register and
the LSByte is written to the PMADRL register. The
upper MSbits of PMADRH must always be clear.
7.2
PMCON1 Register
PMCON1 is the control register for memory accesses.
The control bit RD initiates read operations. This bit
cannot be cleared, only set, in software. It is cleared in
hardware at the completion of the read operation.
REGISTER 7-1:
PMCON1: PROGRAM MEMORY CONTROL REGISTER 1 (ADDRESS 18Ch)
R-1
U-0
R/S-0
reserved
—RD
bit 7
bit 0
bit 7
Reserved: Read as ‘1’
bit 6-1
Unimplemented: Read as ‘0’
bit 0
RD: Read Control bit
1
= Initiates a FLASH read, RD is cleared in hardware. The RD bit can only be set (not cleared)
in software.
0
= Does not initiate a FLASH read
Legend:
W = Writable bit
U = Unimplemented bit, read as ‘0’
R = Readable bit
S = Settable bit
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
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