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参数资料
| 型号： | PIC16F74T-I/PT |
| 厂商： | Microchip Technology |
| 文件页数： | 77/104页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 4KX14 A/D 44TQFP |
| 产品培训模块： | Asynchronous Stimulus |
| 标准包装： | 1,200 |
| 系列： | PIC® 16F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 20MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 33 |
| 程序存储器容量： | 7KB（4K x 14） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 192 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4 V ~ 5.5 V |
| 数据转换器： | A/D 8x8b |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-TQFP |
| 包装： | 带卷 (TR) |
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Micrel, Inc.
KSZ8851-16MLLJ
March 2010
66
M9999-030210-1.0
MAC Address Hash Table Register 0 (0xA0 – 0xA1): MAHTR0
The 64-bit MAC address table is used for group address filtering and it is enabled by selecting item 5 “Hash perfect” mode
in Table 3 (Address Filtering Scheme). This value is defined as the six most significant bits from CRC circuit calculation
result that is based on 48-bit of DA input. The two most significant bits select one of the four registers to be used, while
the others determine which bit within the register.
Multicast table register 0.
Bit
Default Value
R/W
Description
15-0
0x0
RW
HT0 Hash Table 0
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
MAC Address Hash Table Register 1 (0xA2 – 0xA3): MAHTR1
Multicast table register 1.
Bit
Default Value
R/W
Description
15-0
0x0
RW
HT1 Hash Table 1
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXAE) or receive multicast (RXME) bit is set in the RXCR1, all
multicast addresses are received regardless of the multicast table value.
MAC Address Hash Table Register 2 (0xA4 – 0xA5): MAHTR2
Multicast table register 2.
Bit
Default Value
R/W
Description
15-0
0x0
RW
HT2 Hash Table 2
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXAE) or receive multicast (RXME) bit is set in the RXCR1, all
multicast addresses are received regardless of the multicast table value.
MAC Address Hash Table Register 3 (0xA6 – 0xA7): MAHTR3
Multicast table register 3.
Bit
Default Value
R/W
Description
15-0
0x0
RW
HT3 Hash Table 3
When the appropriate bit is set, if the packet received with DA matches the CRC, the
hashing function is received without being filtered.
When the appropriate bit is cleared, the packet will drop.
Note: When the receive all (RXAE) or receive multicast (RXME) bit is set in the RXCR1, all
multicast addresses are received regardless of the multicast table value.
0xA8 – 0xAF: Reserved
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