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参数资料
| 型号： | PIC16F83T-10I/SO |
| 厂商： | Microchip Technology |
| 文件页数： | 48/80页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 512X14 EE 18SOIC |
| 标准包装： | 1,100 |
| 系列： | PIC® 16F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 10MHz |
| 外围设备： | POR，WDT |
| 输入/输出数： | 13 |
| 程序存储器容量： | 896B（512 x 14） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 64 x 8 |
| RAM 容量： | 36 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4 V ~ 6 V |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 18-SOIC（0.295"，7.50mm 宽） |
| 包装： | 带卷 (TR) |
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Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
52
M9999-083109-2.0
Bit
Default Value
R/W
Description
3
-
RO
RXFT Receive Frame Type
When this bit is set, it indicates that the frame is an Ethernet-type frame (frame length is
greater than 1500 bytes). When clear, it indicates that the frame is an IEEE 802.3 frame.
This bit is not valid for runt frames.
2
-
RO
RXFTL Receive Frame Too Long
When this bit is set, it indicates that the frame length exceeds the maximum size of 2000
bytes. Frames that are too long are passed to the host only if the pass bad frame bit is
set.
Note: Frame too long is only a frame length indication and does not cause any frame
truncation.
1
-
RO
RXRF Receive Runt Frame
When this bit is set, it indicates that a frame was damaged by a collision or had a
premature termination before the collision window passed.
Runt frames are passed to the host only if the pass bad frame bit is set.
0
-
RO
RXCE Receive CRC Error
When this bit is set, it indicates that a CRC error has occurred on the current received
frame.
CRC error frames are passed to the host only if the pass bad frame bit is set.
Receive Frame Header Byte Count Register (0x7E – 0x7F): RXFHBCR
This register indicates the received frame header byte count information, the received frames are reported in RXFCTR
register. This register contains the total number of bytes information for the frame received and the CPU can read so
many times same as the frame count value in the RXFCTR.
Bit
Default Value
R/W
Description
15-12
-
RO
Reserved
11-0
-
RO
RXBC Receive Byte Count
This field indicates the present received frame byte size.
TXQ Command Register (0x80 – 0x81): TXQCR
This register is programmed by the Host CPU to issue a transmit command to the TXQ. The present transmit frame in
the TXQ memory is queued for transmit.
Bit
Default Value
R/W
Description
15-3
-
RW
Reserved
2
0x0
RW
AETFE Auto-Enqueue TXQ Frame Enable
When this bit is written as 1, the KSZ8851SNL will enable current all TX frames prepared
in the TX buffer are queued to transmit automatically.
The bit 0 METFE has to be set 0 when this bit is set to 1 in this register.
1
0x0
RW
TXQMAM TXQ Memory Available Monitor
When this bit is written as 1, the KSZ8851SNL will generate interrupt (bit 6 in ISR register)
to CPU when TXQ memory is available based upon the total amount of TXQ space
requested by CPU at TXNTFSR (0x9E) register.
Note: This bit is self-clearing after the frame is finished transmitting. The software should
wait for the bit to be cleared before set to 1 again.
0
0x0
RW
METFE Manual Enqueue TXQ Frame Enable
When this bit is written as 1, the KSZ8851SNL will enable current TX frame prepared in
the TX buffer is queued for transmit, this is only transmit one frame at a time.
Note: This bit is self-clearing after the frame is finished transmitting. The software should
wait for the bit to be cleared before setting up another new TX frame.
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| PIC16F84-04/SO | 功能描述:8位微控制器 -MCU 1.75KB 68 RAM 13 I/O 4MHz SOIC18 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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