参数资料
型号: PIC17C766-16I/L
厂商: Microchip Technology
文件页数: 133/159页
文件大小: 0K
描述: IC MCU OTP 16KX16 A/D 84PLCC
产品培训模块: Asynchronous Stimulus
标准包装: 16
系列: PIC® 17C
核心处理器: PIC
芯体尺寸: 8-位
速度: 16MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 66
程序存储器容量: 32KB(16K x 16)
程序存储器类型: OTP
RAM 容量: 902 x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
数据转换器: A/D 16x10b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 84-LCC(J 形引线)
包装: 管件
配用: AC164318-ND - MODULE SKT MPLAB PM3 84PLCC
DVA17XL841-ND - DEVICE ADAPTER FOR PIC17C762
DM173001-ND - KIT DEVELOPMENT PICDEM17
AC164027-ND - ADAPTER PICSTART PLUS 84PLCC
AC174012-ND - MODULE SKT PROMATEII 84PLCC
PIC17C7XX
DS30289B-page 74
2000 Microchip Technology Inc.
10.2
PORTB and DDRB Registers
PORTB is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is DDRB. A ’1’ in DDRB
configures the corresponding port pin as an input. A ’0’
in the DDRB register configures the corresponding port
pin as an output. Reading PORTB reads the status of
the pins, whereas writing to PORTB will write to the port
latch.
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is
done by clearing the RBPU (PORTA<7>) bit. The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are enabled on
any RESET.
PORTB also has an interrupt-on-change feature. Only
pins configured as inputs can cause this interrupt to
occur (i.e., any RB7:RB0 pin configured as an output is
excluded from the interrupt-on-change comparison).
The input pins (of RB7:RB0) are compared with the
value in the PORTB data latch. The “mismatch” outputs
of RB7:RB0 are OR’d together to set the PORTB Inter-
rupt Flag bit, RBIF (PIR1<7>).
This interrupt can wake the device from SLEEP. The
user, in the Interrupt Service Routine, can clear the
interrupt by:
a)
Read-Write PORTB (such as: MOVPF PORTB,
PORTB
). This will end the mismatch condition.
b)
Then, clear the RBIF bit.
A mismatch condition will continue to set the RBIF bit.
Reading, then writing PORTB, will end the mismatch
condition and allow the RBIF bit to be cleared.
This interrupt-on-mismatch feature, together with soft-
ware configurable pull-ups on this port, allows easy
interface to a keypad and makes it possible for wake-
up on key depression. For an example, refer to Appli-
cation Note AN552, “Implementing Wake-up on
Keystroke.”
The interrupt-on-change feature is recommended for
wake-up on operations, where PORTB is only used for
the interrupt-on-change feature and key depression
operations.
FIGURE 10-5:
BLOCK DIAGRAM OF RB5:RB4 AND RB1:RB0 PORT PINS
Note:
On a device RESET, the RBIF bit is inde-
terminate, since the value in the latch may
be different than the pin.
Note: I/O pins have protection diodes to VDD and VSS.
Data Bus
Q
D
CK
Q
D
CK
Weak
Pull-up
Port
Input Latch
Port
Data
OE
WR_PORTB (Q4)
WR_DDRB (Q4)
RD_PORTB (Q2)
RD_DDRB (Q2)
RBIF
RBPU
Match Signal
from other
port pins
(PORTA<7>)
Peripheral Data In
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