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参数资料
型号： PIC17C766T-33I/PT
厂商： Microchip Technology
文件页数： 112/159页
文件大小： 0K
描述： IC MCU OTP 16KX16 A/D 80TQFP
标准包装： 1,200
系列： PIC® 17C
核心处理器： PIC
芯体尺寸： 8-位
速度： 33MHz
连通性： I²C，SPI，UART/USART
外围设备： 欠压检测/复位，POR，PWM，WDT
输入/输出数： 66
程序存储器容量： 32KB（16K x 16）
程序存储器类型： OTP
RAM 容量： 902 x 8
电压 - 电源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
数据转换器： A/D 16x10b
振荡器型： 外部
工作温度： -40°C ~ 85°C
封装/外壳： 80-TQFP
包装： 带卷 (TR)
配用： XLT80PT3-ND - SOCKET TRAN ICE 80MQFP/TQFP
AC174011-ND - MODULE SKT PROMATEII 80TQFP
2000 Microchip Technology Inc.
DS30289B-page 55
PIC17C7XX
7.4.2
INDIRECT ADDRESSING
OPERATION
The indirect addressing capability has been enhanced
over that of the PIC16CXX family. There are two control
bits associated with each FSR register. These two bits
configure the FSR register to:
Auto-decrement the value (address) in the FSR
after an indirect access
Auto-increment the value (address) in the FSR
after an indirect access
No change to the value (address) in the FSR after
an indirect access
These control bits are located in the ALUSTA register.
The FSR1 register is controlled by the FS3:FS2 bits
and FSR0 is controlled by the FS1:FS0 bits.
When using the auto-increment or auto-decrement fea-
tures, the effect on the FSR is not reflected in the
ALUSTA register. For example, if the indirect address
causes the FSR to equal '0', the Z bit will not be set.
If the FSR register contains a value of 0h, an indirect
read will read 0h (Zero bit is set) while an indirect write
will be equivalent to a NOP (status bits are not affected).
Indirect addressing allows single cycle data transfers
within the entire data space. This is possible with the
use of the MOVPF and MOVFP instructions, where either
'p' or 'f' is specified as INDF0 (or INDF1).
If the source or destination of the indirect address is in
banked memory, the location accessed will be deter-
mined by the value in the BSR.
A simple program to clear RAM from 20h - FFh is
shown in Example 7-1.
EXAMPLE 7-1:
INDIRECT ADDRESSING
7.5
Table Pointer (TBLPTRL and
TBLPTRH)
File registers TBLPTRL and TBLPTRH form a 16-bit
pointer to address the 64K program memory space.
The table pointer is used by instructions TABLWT and
TABLRD
.
The TABLRD and the TABLWT instructions allow trans-
fer of data between program and data space. The table
pointer serves as the 16-bit address of the data word
within the program memory. For a more complete
description of these registers and the operation of
Table Reads and Table Writes, see Section 8.0.
7.6
Table Latch (TBLATH, TBLATL)
The table latch (TBLAT) is a 16-bit register, with
TBLATH and TBLATL referring to the high and low
bytes of the register. It is not mapped into data or pro-
gram memory. The table latch is used as a temporary
holding latch during data transfer between program
and data memory (see TABLRD, TABLWT, TLRD and
TLWT
instruction descriptions). For a more complete
description of these registers and the operation of
Table Reads and Table Writes, see Section 8.0.
MOVLW
0x20
;
MOVWF
FSR0
; FSR0 = 20h
BCF
ALUSTA, FS1
; Increment FSR
BSF
ALUSTA, FS0
; after access
BCF
ALUSTA, C
; C = 0
MOVLW
END_RAM + 1
;
LP
CLRF
INDF0, F
; Addr(FSR) = 0
CPFSEQ FSR0
; FSR0 = END_RAM+1?
GOTO
LP
; NO, clear next
:
; YES, All RAM is
:
; cleared
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PIC17LC42A-08/PQ 功能描述:8位微控制器 -MCU 4KB 232 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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