参数资料
型号: PIC18F2431-E/MM
厂商: Microchip Technology
文件页数: 83/119页
文件大小: 0K
描述: IC MCU FLASH 8KX16 28QFN
标准包装: 61
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 40MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,LVD,电源控制 PWM,QEI,POR,PWM,WDT
输入/输出数: 24
程序存储器容量: 16KB(8K x 16)
程序存储器类型: 闪存
EEPROM 大小: 256 x 8
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 4.2 V ~ 5.5 V
数据转换器: A/D 5x10b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 28-VQFN 裸露焊盘
包装: 管件
其它名称: PIC18F2431-E/ML
PIC18F2431-E/ML-ND
PIC18F2331/2431/4331/4431
DS39616D-page 66
2010 Microchip Technology Inc.
6.4
Instructions in Program Memory
The program memory is addressed in bytes. Instructions
are stored as two bytes or four bytes in program memory.
The Least Significant Byte of an instruction word is
always stored in a program memory location with an
even address (LSB = 0). Figure 6-5 shows an example of
how instruction words are stored in the program memory.
To maintain alignment with instruction boundaries, the
PC increments in steps of 2 and the LSB will always read
‘0’.
The CALL and GOTO instructions have the absolute
program memory address embedded into the instruction.
Since instructions are always stored on word boundaries,
the data contained in the instruction is a word address.
The word address is written to PC<20:1>, which
accesses the desired byte address in program memory.
Instruction 2 in Figure 6-5 shows how the instruction,
‘GOTO 000006h’, is encoded in the program memory.
Program branch instructions, which encode a relative
address offset, operate in the same manner. The offset
value stored in a branch instruction represents the num-
ber of single-word instructions that the PC will be offset
further details of the instruction set.
6.4.1
TWO-WORD INSTRUCTIONS
The standard PIC18 instruction set has four two-word
instructions: CALL, MOVFF, GOTO and LSFR. In all
cases, the second word of the instructions always has
‘1111’ as its four Most Significant bits; the other 12 bits
are literal data, usually a data memory address.
The use of ‘1111’ in the four MSbs of an instruction
specifies a special form of NOP. If the instruction is exe-
cuted in proper sequence, immediately after the first
word, the data in the second word is accessed and
used by the instruction sequence. If the first word is
skipped for some reason and the second word is
executed by itself, a NOP is executed instead. This is
necessary for cases when the two-word instruction is
preceded by a conditional instruction that changes the
PC. Example 6-4 shows how this works.
FIGURE 6-5:
INSTRUCTIONS IN PROGRAM MEMORY
EXAMPLE 6-4:
TWO-WORD INSTRUCTIONS
Note:
For information on two-word instructions
in the extended instruction set, see
CASE 1:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2
; No, skip this word
1111 0100 0101 0110
; Execute this word as a NOP
0010 0100 0000 0000
ADDWF
REG3
; continue code
CASE 2:
Object Code
Source Code
0110 0110 0000 0000
TSTFSZ
REG1
; is RAM location 0?
1100 0001 0010 0011
MOVFF
REG1, REG2
; Yes, execute this word
1111 0100 0101 0110
; 2nd word of instruction
0010 0100 0000 0000
ADDWF
REG3
; continue code
Word Address
LSB = 1
LSB = 0
Program Memory
Byte Locations
000000h
000002h
000004h
000006h
Instruction 1:
MOVLW
055h
0Fh
55h
000008h
Instruction 2:
GOTO
000006h
EFh
03h
00000Ah
F0h
00h
00000Ch
Instruction 3:
MOVFF
123h, 456h
C1h
23h
00000Eh
F4h
56h
000010h
000012h
000014h
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