Head Office:
PMC-Sierra, Inc.
8555 Baxter Place
Burnaby, B.C. V5A 4V7
Canada
Tel: +1.604.415.6000
Fax: +1.604.415.6200
Octal Short Haul T1/E1/J1 Low Latency Transport Line Interface
To order documentation,
send email to:
document@pmc-sierra.com
or contact the head office,
Attn: Document Coordinator
All product documentation is available on
our web site at:
http://www.pmc-sierra.com
For corporate information,
send email to:
info@pmc-sierra.com
PMC-2030527 (R2)
Copyright PMC-Sierra, Inc. 2003. All
rights reserved. March 2003.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE PM4325 OCTLIU ST
SINGLE MAGNETIC LINE PROTECTON
T1/E1 FRAMER/TRANCEIVER
VOICE GATEWAY
PM4325
OCTLIU ST
PM6388
EOCTL
Clock and Data
Backplane
PM4325
OCTLIU ST
PM6388
TOCTL
Clock and Data
8 T1 Lines
Backplane
8 E1 Lines
TE 32
SBI
T1/E1 Framer/Mapper
PCM Highwway
H-MVIP
PM4325
OCTLIU ST
DSP
PM5366
TEMAP 84
SBI TR
T1/E1 Framer/Mapper
Working
Protect
Magnetic
Line I/F
Card
OOOOCTLIU-LT
PPPPM4323
11 x OCTLIU ST
Cross-connect
84 T1 Lines
63 E1 Lines
TYPICAL APPLICATIONS
Generates E1 pulses compliant to G.703
recommendations.
Provides line outputs that are current
limited and may be tristated for protection
or use in redundant applications.
Provides a digital phase locked loop for
generation of a low jitter transmit clock
complying with all jitter attenuation, jitter
transfer, and residual jitter specifications
of AT&T TR 62411 and ETSI TBR 12 and
TBR 13.
Accepts either dual rail or single rail
DS-1/E1 signals or parallel data from the
SBI/SBI TR interface.
Performs B8ZS or AMI encoding when
processing a single rail or SBI/SBI TR-
sourced DS-1 signal and HDB3 or AMI
encoding when processing a single rail or
SBI/SBI TR-sourced E1 signal.
Provides a programmable depth FIFO
buffer for jitter attenuation, rate
conversion, and latency optimization in
the transmit path.
GENERAL
Provides an 8-bit microprocessor bus
interface for configuration, control, and
status monitoring.
Provides a hardware-only (no
microprocessor) mode in which
configuration data is read from an
SPI-compatible serial PROM. The
PROM interface can be cascaded such
that multiple OCTLIU ST devices can
be configured simultaneously from a
single PROM.
Supports line and system side
diagnostic loopbacks.
Provides an IEEE 1149.1 (JTAG)
compliant Test Access Port (TAP) and
controller for boundary scan test.
Implemented in low power 3.3 V
tolerant 1.8/3.3 V CMOS technology.
Available in a high-density 288-pin
Tape-SBGA package with a -40 °C to
+85 °C Industrial temperature
operating range.
APPLICATIONS
Metro Optical Access Equipment.
Edge Router Line Cards.
Multi-service ATM Switch Line Cards.
3G Base Wireless Equipment.
Digital Private Branch Exchanges
(PBX).
Digital Access Cross-Connect
Systems (DACS) and Electronic DSX
Cross-Connect Systems (EDSX).