参数资料
型号: PMF18WE1
厂商: Microchip Technology
文件页数: 40/98页
文件大小: 0K
描述: PROCESSOR MODULE FOR ICE4000
标准包装: 1
模块/板类型: 处理器模块
适用于相关产品: ICE4000
MPLAB ? ICE 4000 User’s Guide
Figure 6-1 shows what the tab will look like for a sequential event and program memory
selection. This is the typical layout of the Complex Trigger Settings tab.
FIGURE 6-1:
COMPLEX TRIGGER – PROGRAM MEMORY, SEQUENTIAL
1
2
For information on trigger type (event) selection, see Section 6.6 “Trigger Type
Trace-related trigger information may be entered in the following items:
? Trigger Position – Used to position the trigger location in the trace memory
window, indicating the number of cycles captured by the trace memory window
after the trigger occurs (Cycles Traced After Trigger). The approximate cycle that
generated the trigger will be indicated with an arrow.
? Halt On Trigger – The trigger point will generate a hardware breakpoint, halting
the processor, and will be the last entry in the trace memory window. To capture
traces without halting the target, unselect this option.
? Halt On Cycles After Trigger – The trigger point will not generate a hardware
breakpoint until the Cycles Traced After Trigger is reached. Then the processor
will be halted. To capture traces without halting the target, unselect this option.
? Halt On Trace Buffer Full – A trigger will cause the trace buffer to stop before
overwriting old data. When the trace buffer is full (64K-1 or 65535 entries), a
hardware breakpoint will halt the processor.
Note:
The number of downloaded lines specified in the Configure Trace tab does
not affect the number of cycles collected, and Trigger Position still applies.
? Ignore FNOP Cycles – Specifies whether or not forced NOP cycles are to be
considered in the event processing. A forced NOP cycle is the second cycle of a
two-cycle instruction. Since the PICmicro ? MCU architecture is pipelined, it
prefetches the next instruction in the physical address space while it is executing
the current instruction. However, if the current instruction changes the program
counter, this prefetched instruction is explicitly ignored, causing a forced NOP
cycle.
DS51490A-page 34
? 2004 Microchip Technology Inc.
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