参数资料
型号: PQ24033QGA25NKS
厂商: SYNQOR INC
元件分类: 电源模块
英文描述: 1-OUTPUT 82.5 W DC-DC REG PWR SUPPLY MODULE
文件页数: 3/13页
文件大小: 574K
代理商: PQ24033QGA25NKS
Input:
Output:
Current:
PPackage:
ackage:
18-36 V
3.3 V
25 A
25 A (82.5W)
(82.5W)
Quarter-brick
T
Technical S
echnical Specification
pecification
Product # PQ24033QGA25
Phone 1-888-567-9596
Doc.# 005-2QG233D Rev. B
08/17/06
Page 11
APPLICATION CONSIDERATIONS
Input System Instability: This condition can occur
because any DC/DC converter appears incrementally as a
negative resistance load. A detailed application note titled
“Input System Instability” is available on the SynQor web site
(www.synqor.com) which provides an understanding of why
this instability arises, and shows the preferred solution for cor-
recting it.
Application Circuits: Figure D below provides a typical cir-
cuit diagram which details the input filtering and voltage trim-
ming.
Input Filtering and External Capacitance: Figure E
below provides a diagram showing the internal input filter com-
ponents. This filter dramatically reduces input terminal ripple
current, which otherwise could exceed the rating of an external
electrolytic input capacitor. The recommended external input
capacitance is specified in the “Input Characteristics” section.
More detailed information is available in the application note
titled “EMI Characteristics” on the SynQor website.
Startup Inhibit Period: The Startup Inhibit Period ensures
that the converter will remain off for at least 200ms when it is
shut down for any reason. When an output short is present,
this generates a 5Hz "hiccup mode," which prevents the con-
verter from overheating. In all, there are seven ways that the
converter can be shut down, initiating a Startup Inhibit Period:
Input Under-Voltage Lockout
Input Over-Voltage Shutdown (not present in Quarter-brick)
Output Over-Voltage Protection
Over Temperature Shutdown
Current Limit
Short Circuit Protection
Turned off by the ON/OFF input
Figure F shows three turn-on scenarios, where a Startup Inhibit
Period is initiated at t0, t1, and t2:
Before time t0, when the input voltage is below the UVL thresh-
old, the unit is disabled by the Input Under-Voltage Lockout fea-
ture. When the input voltage rises above the UVL threshold, the
Input Under-Voltage Lockout is released, and a Startup Inhibit
Vin
External
Input
Filter
Trim
Vin(+)
Iload
Cload
L
C
Vout(+)
Rtrim-up
or
Rtrim-down
Vsense(+)
ON/OFF
Vin(_)
Vin(+)
Vin(_)
Vout(_)
Vsense(_)
Electrolytic
Capacitor
100F
Figure D: Typical application circuit (negative logic unit, permanently enabled).
Figure E: Internal Input Filter Diagram (component values listed on page 3).
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