![](http://datasheet.mmic.net.cn/140000/PS12014-A_datasheet_4989913/PS12014-A_1.png)
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS12014-A
FLAT-BASE TYPE
INSULATED TYPE
Jan. 2000
4-
φ4
13
8.5
(7.75)
2
± 0.3
92.5
±1
2.45
±0.3
83.5
±0.5
6
± 0.3
56
± 0.8
71.5
± 0.5
80.5
± 1
0.6
0.5
78.75
1.2
31
32
34
35
36
4-R4
LABEL
33
0.5
2.5
23
1
76.5
± 1
20.4
± 1
50.8
± 0.8
27
± 1
10.16
± 0.3
5
(10.35)
1 CBU+
2 CBU–
3 CBV+
4 CBV–
5 CBW+
6 CBW–
7 GND
8 VDL
9 VDH
10 CL
11 FO1
12 FO2
13 FO3
14 CU
15 CV
16 CW
17 UP
18 VP
19 WP
20 UN
21 VN
22 WN
23 Br
31 P
32 B
33 N
34 U
35 V
36 W
Terminals Assignment:
PS12014-A
PACKAGE OUTLINES
MITSUBISHI SEMICONDUCTOR <Application Specific Intelligent Power Module>
PS12014-A
FLAT-BASE TYPE
INSULATED TYPE
(Fig. 1)
INTEGRATED FUNCTIONS AND FEATURES
3-Phase IGBT inverter bridge configured by the latest 3rd.
generation IGBT and diode technologies.
Circuit for dynamic braking of motor regenerative energy.
Inverter output current capability Io (Note 1) :
APPLICATION
Acoustic noise-less 0.75kW/AC400V Class 3 Phase inverter and other motor control appli-
cations.
INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS:
For P-Side IGBTs : Drive circuit, High-speed photo-couplers, Short circuit protection (SC),
Bootstrap circuit supply scheme (Single drive power supply ) and Under-voltage protection (UV).
For N-Side IGBTs : Drive circuit, Short-circuit protection (SC), Control supply Under voltage and Over voltage protection (OV/UV),
System Over temperature protection (OT), Fault output signaling circuit (Fo), and Current-Limit warning signal out-
put (CL).
For Brake circuit IGBT : Drive circuit.
Warning and Fault signaling :
FO1 : Short circuit protection for lower-leg IGBTs and Input interlocking against spurious arm shoot-through.
FO2 : N-side control supply abnormality locking (OV/UV)
FO3 : System over-temperature protection (OT).
CL : Warning for inverter current overload condition
For system feedback control : Analogue signal feedback reproducing actual inverter output phase current (3
φ).
Input Interface : 5V CMOS/TTL compatible, Schmitt trigger input, and Arm-Shoot-Through interlock protection.
Type Name
PS12014-A
100% load
3.4A (rms)
150% over load
5.1A (rms), 1min
(Note 1) : The inverter output current is assumed to be sinu-
soidal and the peak current value of each of the
above loading cases is defined as : Iop = Io !
√2