参数资料
型号: PS9305L-E3-AX
厂商: CEL
文件页数: 5/20页
文件大小: 0K
描述: PHOTOCOUPLER IGBT GATE DVR 8SOIC
标准包装: 2,000
系列: NEPOC
电压 - 隔离: 5000Vrms
通道数: 1,单向
电流 - 输出 / 通道: 2A
传输延迟高 - 低 @ 如果: 180ns @ 10mA
电流 - DC 正向(If): 16mA
输入类型: DC
输出类型: 栅极驱动器
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.268",6.81mm 宽)
供应商设备封装: 8-SDIP 鸥翼型
包装: 带卷 (TR)
其它名称: PS9305L-E3-AX-ND
PS9305L-E3-AXTR
PS9305L
Chapter Title
ELECTRICAL CHARACTERISTICS
(V EE = GND, unless otherwise specified and refer to RECOMMENDED OPERATING CONDITIONS)
Parameter
Symbol
Conditions
MIN.
TYP.
*1
MAX.
Unit
Diode
Forward Voltage
V F
I F = 10 mA, T A = 25 ° C
1.2
1.56
1.8
V
Reverse Current
Terminal Capacitance
I R
C t
V R = 3 V, T A = 25 ° C
f = 1 MHz, V F = 0 V, T A = 25 ° C
30
10
μ A
pF
Detector High Level Output Current
I OH
V O = (V CC ? 4 V)
*2
0.5
2.0
A
V O = (V CC ? 15 V)
*3
2.0
Low Level Output Current
I OL
V O = (V EE + 2.5 V)
*2
0.5
2.0
A
V O = (V EE + 15 V)
*3
2.0
High Level Output Voltage
V OH
I O = ? 100 mA
*4
V CC ? 3.0 V CC ? 1.5
V
Low Level Output Voltage
V OL
I O = 100 mA
0.1
0.5
V
<R>
<R>
High Level Supply Current
Low Level Supply Current
I CCH
I CCL
V O = open, I F = 10 mA
V O = open, V F = 0 to +0.8 V
1.4
1.3
3.0
3.0
mA
mA
UVLO Threshold
V UVLO+
V O > 5 V, I F = 10 mA
10.8
12.3
13.4
V
V UVLO ?
9.5
11.0
12.5
UVLO Hysteresis
UVLO HYS V O > 5 V, I F = 10 mA
0.4
1.3
V
Coupled Threshold Input Current
I FLH
I O = 0 mA, V O > 5 V
2.0
5.0
mA
(L → H)
Threshold Input Voltage
V FHL
I O = 0 mA, V O < 5 V
0.8
V
(H → L)
*1 Typical values at T A = 25 ° C.
*2 Maximum pulse width = 50 μ s, Maximum duty cycle = 0.5%.
*3 Maximum pulse width = 10 μ s, Maximum duty cycle = 0.2%
*4 V OH is measured with the DC load current in this testing (Maximum pulse width = 2 ms, Maximum duty cycle =
20%).
R08DS0013EJ0100 Rev.1.00
May 16, 2011
Page 5 of 18
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