参数资料
型号: PS9552L2-E3-AX
厂商: CEL
文件页数: 7/22页
文件大小: 0K
描述: ISOLATOR 5KVRMS 1CH GATE 8DIP
产品目录绘图: Dual Output Pin Out
标准包装: 1,000
系列: NEPOC
电压 - 隔离: 5000Vrms
通道数: 1,单向
电流 - 输出 / 通道: 2.5A
传输延迟高 - 低 @ 如果: 300ns @ 7mA ~ 16mA
电流 - DC 正向(If): 16mA
输入类型: DC
输出类型: 栅极驱动器
安装类型: 表面贴装
封装/外壳: 8-SMD,鸥翼型
供应商设备封装: 8-SMD 鸥翼型
包装: 带卷 (TR)
PS9552,PS9552L1,PS9552L2,PS9552L3
ELECTRICAL CHARACTERISTICS (T A = 40 to +100 C, V CC = 15 to 30 V, I F (ON) = 7 to 16 mA,
V F (OFF) = 2 to 0.8 V, V EE = GND, unless otherwise specified)
Parameter
Symbol
Conditions
MIN.
TYP. *1
MAX.
Unit
<R>
Diode
Forward Voltage
Input Capacitance
V F
C IN
I F = 10 mA, T A = 25 C
f = 1 MHz, V F = 0 V, T A = 25 C
1.3
1.65
30
2.1
V
pF
Detector High Level Output Current
I OH
V O = (V CC 4 V)
*2
0.5
2.0
A
V O = (V CC 15 V) *3
2.0
Low Level Output Current
I OL
V O = (V EE + 2.5 V) *2
0.5
2.0
A
V O = (V EE + 15 V)
*3
2.0
High Level Output Voltage
V OH
I O = 100 mA
*4
V CC 3.5 V CC 2.5 V CC 1.5
V
Low Level Output Voltage
High Level Supply Current
Low Level Supply Current
V OL
I CCH
I CCL
I O = 100 mA
V O = open, I F = 7 to 16 mA
V O = open, V F = 2 to +0.8 V
0.1
2.0
2.0
0.5
5.0
5.0
V
mA
mA
UVLO Threshold
V UVLO+
V O > 5 V, I F = 10 mA
11.0
12.3
13.5
V
V UVLO
9.5
10.7
12.0
UVLO Hysteresis
UVLO HYS V O > 5 V, I F = 10 mA
1.6
V
Coupled
Threshold Input Current
I FLH
I O = 0 mA, V O > 5 V
2.0
5.0
mA
(L
H)
Threshold Input Voltage
V FHL
I O = 0 mA, V O < 5 V
0.8
V
(H
L)
*1 Typical values at T A = 25 C.
*2 Maximum pulse width = 50 s, Maximum duty cycle = 0.5%.
*3 Maximum pulse width = 10 s, Maximum duty cycle = 0.2%
*4 V OH is measured with the DC load current in this testing (Maximum pulse width = 2 ms, Maximum duty cycle =
20%).
Data Sheet PN10589EJ07V0DS
7
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