参数资料
型号: PSC159-2
厂商: Power-One
文件页数: 16/17页
文件大小: 0K
描述: SWITCHING REGULATOR 135W 15V
标准包装: 1
系列: *

PSC, PSL Series Data Sheet
?
Description of Options
-9 Extended Temperature Range
This option defines an extended temperature range as
specified in table 8.
P Potentiometer
Note: Option P is not recommended, if several regulators are
Positive Switching Regulators
The switching characteristics of the option D output are shown
in fig. Definition of V t and V H .
The voltage V t can be externally adjusted by a trim
potentiometer. The hysteresis V H of V t is <2%. Pin D stays low
for a minimum time t low min , in order to prevent any oscillation. V t
can be set to a value between V i min and V i max . Note that the
JFET becomes conductive, when V D exceeds approx. 7 V.
11025
operated in parallel connection.
Option P excludes R function; the R-input (pin 16) should be
left open-circuit. The output voltage V o can be adjusted in the
range 90 – 110% of V o nom .
However, the minimum differential voltage ? V i o min between
V t
Vi +
JFET
D
8.2 V
I D
V D
10 k ?
100 pF
+5 V
input and output specified in Electrical Input Data should be
observed.
L Input Filter
Gi –
Go –
Option L is recommended to reduce superimposed inter-
ference voltages and to prevent oscillations, if input lines
Fig. 14
Test circuit with definition of voltage V D and current I D
exceed the length of approx. 5 m in total. The fundamental
wave (approx. 120 kHz) of the reduced interference voltage
between Vi+ and Gi– has, with an input line inductance of
5 μH, a maximum magnitude of 4 mVAC.
The input impedance of the switching regulator at 120 kHz is
about 3.5 ? . The harmonics are small in comparison with the
fundamental wave.
V D
V D high
V H
11026
With option L, the maximum permissible additionally
superimposed ripple v i of the input voltage (rectifier mode) at
a specified input frequency f i has the following values:
v i max = 10 V pp at 100 Hz or V pp = 1000 Hz/ f i ? 1V
V D low
Fig. 15
Definition of V t and V H
V t
V i
C Thyristor Crowbar
Table 12: Data of option D
Option C protects the load against power supply malfunction.
It is not designed to sink external currents. A fixed-value
monitoring circuit checks the output voltage V o . When the
trigger voltage V o c is reached, the thyristor crowbar triggers
Characteristics
V D low Low impedance
Conditions
V i < V t , I D ≤ 2.5 mA
PSC/ PSL
min typ max
0.8
Unit
V
and disables the output. It may be deactivated by removal of
the input voltage. In case of a defect switching transistor, the
internal fuse prevents excessive current.
Note : The crowbar can be reset by removal of the input voltage
only. The inhibit signal cannot deactivate the thyristor.
D or D1 Input / Output Undervoltage Monitor
V D high Highimpedance
t low min Min. durat. V Dlow
t Df Response to V D low
I D
Current through D
V i > V t + V H ,
I D > 25 mA
4.75
30
1
20
ms
ms
mA
Note: Output instead of input undervoltage monitor is
available on request (Option D1).
K
Connector Coding Strip
Terminal D and Go– are connected to a normally conducting
For PSL models only.
field effect transistor (JFET). A 0.5 W Zener diode protects
against overvoltages.
G
RoHS Compliance
Table 11: Crowbar trigger levels
Models with G are RoHS-compliant for all six substances.
Characteristics
Conditions
V o = 5.1 V
V o = 12 V
V o = 15 V
V o = 24 V
V o = 36 V
Unit
V o c Trigger voltage T C min – T C max
min
5.8
typ
max min
6.8 13.5
typ
max min
16
16.5
typ
max
19
min
27
typ
max
31
min
40
typ max
45
V
t s
Delay time
V i min – V i max
I o = 0 – I o nom
1.5
1.5
1.5
1.5
1.5
μs
BCD20027-G Rev AA, 18-May-2011
Page 16 of 17
www.power-one.com
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