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参数资料
| 型号： | PSD4235F1-C-90UI |
| 厂商： | 意法半导体 |
| 英文描述： | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| 中文描述： | Flash在系统可编程外设的16位微控制器 |
| 文件页数： | 27/93页 |
| 文件大小： | 503K |
| 代理商： | PSD4235F1-C-90UI |
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PSD4000 Series
Preliminary Information
24
The
PSD4000
Functional
Blocks
(cont.)
9.1.1.8.3 Flash Erase Suspend Instruction
When a Flash Sector Erase operation is in progress, the Erase Suspend instruction will
suspend the operation by writing 0B0h to any even address when an appropriate Chip
Select (FSi or CSBOOTi) is true. (See Table 8). This allows reading of data from another
Flash sector after the Erase operation has been suspended. Erase suspend is accepted
only during the Flash Sector Erase instruction execution and defaults to read array
mode. An Erase Suspend instruction executed during an Erase timeout will, in addition to
suspending the erase, terminate the time out.
The Toggle Bit DQ6 stops toggling when the PSD4000 internal logic is suspended. The
toggle Bit status must be monitored at an address within the Flash sector being erased.
The Toggle Bit will stop toggling between 0.1 μs and 15 μs after the Erase Suspend
instruction has been executed. The PSD4000 will then automatically be set to Read Flash
Block Memory Array mode.
If an Erase Suspend instruction was executed, the following rules apply:
Attempting to read from a Flash sector that was being erased will output invalid data.
Reading from a Flash sector that was
not
being erased is valid.
The Flash memory
cannot
be programmed, and will only respond to Erase Resume
and Reset instructions (read is an operation and is OK).
If a Reset instruction is received, data in the Flash sector that was being erased will
be invalid.
9.1.1.8.4 Flash Erase Resume Instruction
If an Erase Suspend instruction was previously executed, the erase operation may be
resumed by this instruction. The Erase Resume instruction consists of writing 030h to any
even address while an appropriate Chip Select (FSi or CSBOOTi) is true. (See Table 8.)
9.1.1.9 Specific Features
9.1.1.9.1 Main Flash and Secondary Flash Sector Protect
Each sector of Main Flash and Secondary Flash memory can be separately protected
against Program and Erase functions. Sector Protection provides additional data
security because it disables all program or erase operations. This mode can be activated
(or deactivated) through the JTAG-ISP Port or a Device Programmer.
Sector protection can be selected for each sector using the PSDsoft program. This will
automatically protect selected sectors when the device is programmed through the JTAG
Port or a Device Programmer. Flash sectors can be unprotected to allow updating of their
contents using the JTAG Port or a Device Programmer. The microcontroller can read (but
cannot change) the sector protection bits.
Any attempt to program or erase a protected Flash sector will be ignored by the device.
The Verify operation will result in a read of the protected data. This allows a guarantee of
the retention of the Protection status.
The sector protection status can either be read by the MCU through the Flash protection
and secondary Flash protection registers (CSIOP), or use the Read Sector Protection
instruction (Table 8).
相关PDF资料 |
PDF描述 |
|---|---|
| PSD4235F2-15UI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F2-70UI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F2-90B81 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F2-90B81I | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F2-90J | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD4235G2-70U | 功能描述:SPLD - 简单可编程逻辑器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD4235G2-90U | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2-90UI | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2V-12UI | 功能描述:CPLD - 复杂可编程逻辑器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2V-90U | 功能描述:CPLD - 复杂可编程逻辑器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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