- 您现在的位置：买卖IC网 > PDF目录368208 > PSD4235F2-15UI (意法半导体) Flash In-System-Programmable Peripherals for 16-Bit MCUs PDF资料下载
参数资料
| 型号： | PSD4235F2-15UI |
| 厂商： | 意法半导体 |
| 英文描述： | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| 中文描述： | Flash在系统可编程外设的16位微控制器 |
| 文件页数： | 23/93页 |
| 文件大小： | 503K |
| 代理商： | PSD4235F2-15UI |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页当前第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页
PSD4000 Series
Preliminary Information
20
9.1.1.6 Programming Flash Memory
Flash memory must be erased prior to being programmed. The MCU may erase Flash
memory all at once or by-sector. Flash memory sector erases to all logic ones, and its bits
are programmed to logic zeros. Although erasing Flash memory occurs on a sector or chip
basis, programming Flash memory occurs on a word basis.
The PSD4000 main Flash and secondary Flash memories require the MCU to send an
instruction to program a word or perform an erase function (see Table 8).
Once the MCU issues a Flash memory program or erase instruction, it must check for the
status of completion. The embedded algorithms that are invoked inside the PSD4000
support several means to provide status to the MCU. Status may be checked using any of
three methods: Data Polling, Data Toggle, or the Ready/Busy output pin.
9.1.1.6.1 Data Polling
Polling on DQ7 (DQ15) is a method of checking whether a Program or Erase instruction is
in progress or has completed. Figure 3 shows the Data Polling algorithm.
When the MCU issues a programming instruction, the embedded algorithm within the
PSD4000 begins. The MCU then reads the location of the word to be programmed in Flash
to check status. Data bit DQ7 (DQ15) of this location becomes the compliment of data bit
7of the original data word to be programmed. The MCU continues to poll this location,
comparing DQ7 (DQ15) and monitoring the Error bit on DQ5 (DQ13). When the DQ7
(DQ15) matches data bit 7 of the original data, and the Error bit at DQ5 (DQ13) remains
‘0’, then the embedded algorithm is complete. If the Error bit at DQ5 is ‘1’, the MCU should
test DQ7 (DQ15) again since DQ7 (DQ15) may have changed simultaneously with DQ5
(DQ13) (see Figure 3).
The Error bit at DQ5 (DQ13) will be set if either an internal timeout occurred while the
embedded algorithm attempted to program the location or if the MCU attempted to
program a ‘1’ to a bit that was not erased (not erased is logic ‘0’).
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed to compare the word that was written to Flash with
the word that was intended to be written.
When using the Data Polling method after an erase instruction, Figure 3 still applies.
However, DQ7 (DQ15) will be ‘0’ until the erase operation is complete. A ‘1’ on DQ5
(DQ13) will indicate a timeout failure of the erase operation, a ‘0’ indicates no error.
The MCU can read any location within the sector being erased to get DQ7 (DQ15) and
DQ5 (DQ13) .
PSDsoft generates ANSI C code functions which implement these Data Polling
algorithms.
The
PSD4000
Functional
Blocks
(cont.)
相关PDF资料 |
PDF描述 |
|---|---|
| PSD4235F2-70UI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F2-90B81 | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F2-90B81I | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F2-90J | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
| PSD4235F2-90JI | Flash In-System-Programmable Peripherals for 16-Bit MCUs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD4235G2-70U | 功能描述:SPLD - 简单可编程逻辑器件 5.0V 4M 70ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD4235G2-90U | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2-90UI | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2V-12UI | 功能描述:CPLD - 复杂可编程逻辑器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD4235G2V-90U | 功能描述:CPLD - 复杂可编程逻辑器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
发布紧急采购，3分钟左右您将得到回复。