参数资料
型号: PSD834F5V-20
厂商: 意法半导体
英文描述: Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
中文描述: Flash在系统可编程(ISP)的周边8位MCU,5V的
文件页数: 13/110页
文件大小: 1737K
代理商: PSD834F5V-20
13/110
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
Note: 1. The pin numbers in this table are for the PLCC package only. See the package information from
Table 74., page 102
onwards, for
pin numbers on other package types.
2. These functions can be multiplexed with other functions.
PC7
11
I/O
PC7 pin of Port C. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
CPLD macrocell (McellBC7) output.
Input to the PLDs.
DBE – active Low Data Byte Enable input from 68HC912 type MCUs.
This pin can be configured as a CMOS or Open Drain output.
PD0
10
I/O
PD0 pin of Port D. This port pin can be configured to have the following functions:
ALE/AS input latches address output from the MCU.
MCU I/O – write or read from a standard output or input port.
Input to the PLDs.
CPLD output (External Chip Select).
PD1
9
I/O
PD1 pin of Port D. This port pin can be configured to have the following functions:
MCU I/O – write to or read from a standard output or input port.
Input to the PLDs.
CPLD output (External Chip Select).
CLKIN – clock input to the CPLD macrocells, the APD Unit’s Power-down counter, and
the CPLD AND Array.
PD2
8
I/O
PD2 pin of Port D. This port pin can be configured to have the following functions:
MCU I/O - write to or read from a standard output or input port.
Input to the PLDs.
CPLD output (External Chip Select).
PSD Chip Select Input (CSI). When Low, the MCU can access the PSD memory and I/O.
When High, the PSD memory blocks are disabled to conserve power.
V
CC
15, 38
Supply Voltage
GND
1, 16,
26
Ground pins
Pin Name
Pin
Type
Description
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PDF描述
PSD854F5V-20 Flash In-System Programmable (ISP) Peripherals for 8-bit MCUs, 5V
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