- 您现在的位置：买卖IC网 > PDF目录368233 > PSD835G1V-A-12J (意法半导体) Configurable Memory System on a Chip for 8-Bit Microcontrollers PDF资料下载
参数资料
| 型号： | PSD835G1V-A-12J |
| 厂商： | 意法半导体 |
| 英文描述： | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| 中文描述： | 在8片位微控制器可配置存储系统 |
| 文件页数： | 3/110页 |
| 文件大小： | 570K |
| 代理商： | PSD835G1V-A-12J |
第1页第2页当前第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页
PSD8XX Family
PSD835G2
2
1.0
Introduction
(Cont.)
Please refer to the revision block at the end of this
document for updated information.
The PSD835G2 device offers two methods to program PSD Flash memory while the PSD
is soldered to a circuit board.
J
In-System Programming (ISP) via JTAG
An IEEE 1149.1 compliant JTAG-ISP interface is included on the PSD enabling the
entire device (both flash memories, the PLD, and all configuration) to be rapidly
programmed while soldered to the circuit board. This requires no MCU participation,
which means the PSD can be programmed anytime, even while completely blank.
The innovative JTAG interface to flash memories is an industry first, solving key
problems faced by designers and manufacturing houses, such as:
First time programming –
How do I get firmware into the flash the very first time
JTAG is the answer, program the PSD while blank with no MCU involvement.
Inventory build-up of pre-programmed devices –
How do I maintain an accurate
count of pre-programmed flash memory and PLD devices based on customer
demand How many and what version JTAG is the answer, build your hardware
with blank PSDs soldered directly to the board and then custom program just before
they are shipped to customer. No more labels on chips and no more wasted
inventory.
Expensive sockets –
How do I eliminate the need for expensive and unreliable
sockets JTAG is the answer. Solder the PSD directly to the circuit board. Program
first time and subsequent times with JTAG. No need to handle devices and bend the
fragile leads.
J
In-Application re-Programming (IAP)
Two independent flash memory arrays are included so the MCU can execute code
from one memory while erasing and programming the other. Robust product firmware
updates in the field are possible over any communication channel (CAN, Ethernet,
UART, J1850, etc) using this unique architecture. Designers are relieved of these
problems:
Simultaneous read and write to flash memory –
How can the MCU program the
same memory from which it is executing code It cannot. The PSD allows the MCU
to operate the two flash memories concurrently, reading code from one while erasing
and programming the other during IAP.
Complex memory mapping –
How can I map these two memories efficiently
A Programmable Decode PLD is embedded in the PSD. The concurrent PSD
memories can be mapped anywhere in MCU address space, segment by segment
with extremely high address resolution. As an option, the secondary flash memory
can be swapped out of the system memory map when IAP is complete. A built-in
page register breaks the MCU address limit.
Separate program and data space –
How can I write to flash memory while it
resides in “program” space during field firmware updates, my 80C51 won’t allow it
The flash PSD provides means to “reclassify” flash memory as “data” space during
IAP, then back to “program” space when complete.
PSDsoft –
ST
’s software development tool – guides you through the design
process step-by-step making it possible to complete an embedded MCU design
capable of ISP/IAP in just hours. Select your MCU and PSDsoft will take you through
the remainder of the design with point and click entry, covering...PSD selection, pin
definitions, programmable logic inputs and outputs, MCU memory map definition, ANSI C
code generation for your MCU, and merging your MCU firmware with the PSD design.
When complete, two different device programmers are supported directly from PSDsoft –
FlashLINK (JTAG) and PSDpro.
The PSD835G2 is available in an 80-pin TQFP package.
相关PDF资料 |
PDF描述 |
|---|---|
| PSD835G1V-A-12JI | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD835G1V-A-12M | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD835G1V-A-12MI | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD835G1V-A-12U | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD835G1V-A-70JI | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD835G2-70U | 功能描述:静态随机存取存储器 5.0V 4M 70ns RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| PSD835G2-90U | 功能描述:静态随机存取存储器 5.0V 4M 90ns RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| PSD835G2-90UI | 功能描述:静态随机存取存储器 5.0V 4M 90ns RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| PSD835G2V-12UI | 功能描述:静态随机存取存储器 3.0V 4M 120ns RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| PSD835G2V-90U | 功能描述:静态随机存取存储器 3.0V 4M 90ns RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
发布紧急采购，3分钟左右您将得到回复。